From patchwork Fri Jul 18 14:36:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 4585451 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 198AB9F37C for ; Fri, 18 Jul 2014 14:39:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4886F20179 for ; Fri, 18 Jul 2014 14:39:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6958F20166 for ; Fri, 18 Jul 2014 14:39:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X89Hg-0006Vr-8B; Fri, 18 Jul 2014 14:37:16 +0000 Received: from mailout1.w1.samsung.com ([210.118.77.11]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X89HY-0006Gu-5W for linux-arm-kernel@lists.infradead.org; Fri, 18 Jul 2014 14:37:08 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N8W00M5EWKZYQ60@mailout1.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 18 Jul 2014 15:36:35 +0100 (BST) X-AuditID: cbfec7f4-b7fac6d000006cfe-eb-53c930f73bb3 Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id C0.5A.27902.7F039C35; Fri, 18 Jul 2014 15:36:39 +0100 (BST) Received: from AMDC1943.digital.local ([106.116.151.171]) by eusync3.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N8W00IGUWKZ2R60@eusync3.samsung.com>; Fri, 18 Jul 2014 15:36:39 +0100 (BST) From: Krzysztof Kozlowski To: Tomasz Figa , Mike Turquette , Kukjin Kim , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] clk: samsung: exynos3250: Enable ARMCLK down feature Date: Fri, 18 Jul 2014 16:36:33 +0200 Message-id: <1405694193-29643-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1405694193-29643-1-git-send-email-k.kozlowski@samsung.com> References: <1405694193-29643-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDJMWRmVeSWpSXmKPExsVy+t/xq7rfDU4GG0z8YWyxccZ6VovXLwwt ehdcZbM42/SG3WLT42usFpd3zWGzmHF+H5PF2iN32S2eTrjIZrF+xmsWBy6PO9f2sHlsXlLv 0bdlFaPH501yASxRXDYpqTmZZalF+nYJXBnNq0wKjkhWHD7Vz9TAOEW0i5GDQ0LAROL2zvou Rk4gU0ziwr31bF2MXBxCAksZJfa2LWYHSQgJ9DFJHPhgCWKzCRhLbF6+BKxIROA2o8TlIzfY QRxmgaOMEtN73zKBVAkL+Eg0zD8I1s0ioCrx79kvRhCbV8BdovXuIxaIdXISJ49NZgW5glPA Q+L3xRiIZe4Sxzb9Y5nAyLuAkWEVo2hqaXJBcVJ6rqFecWJucWleul5yfu4mRkiIfdnBuPiY 1SFGAQ5GJR5ejgkngoVYE8uKK3MPMUpwMCuJ8E7QOBksxJuSWFmVWpQfX1Sak1p8iJGJg1Oq gdG0tdPtpnMff+2J3Z4mCSL1rWUrZ2afjbSzYznH6VPQY7bHo0eWKWS5/5a7yzV5/jAcF/Qr Yfnu4JV1mXuPu4ame2lB+P01p4tUi9kWMyUYMz4QOj9P1WzhdteKjCO+NytNdNadCInY9MRp wQ/m+TPttn+R6W54eits4nM3nnebflhlXm3zUmIpzkg01GIuKk4EALmkfKUPAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140718_073708_365365_83546518 X-CRM114-Status: GOOD ( 12.20 ) X-Spam-Score: -5.0 (-----) Cc: Kyungmin Park , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable ARMCLK down feature on Exynos3250 SoC. The frequency of ARMCLK will be reduced upon entering idle mode (WFI or WFE). The feature behaves like very fast cpufreq ondemand governor. The patch uses simillar settings as Exynos5250 (clk-exynos5250.c), except it disables clock up feature. Signed-off-by: Krzysztof Kozlowski --- Changes since v1: 1. Add PWR_CTRL registers to the list of saved clk registers on Exynos3250. Suggested by Tomasz Figa. 2. Disable the clock up feature. (sug. Tomasz Figa) 3. Use macros for setting clock down ratio. (sug. Tomasz Figa) --- drivers/clk/samsung/clk-exynos3250.c | 41 ++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index 7a17bd40d1dd..a50dc88f0e8f 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -87,6 +87,22 @@ #define SRC_CPU 0x14200 #define DIV_CPU0 0x14500 #define DIV_CPU1 0x14504 +#define PWR_CTRL1 0x15020 +#define PWR_CTRL2 0x15024 + +/* Below definitions are used for PWR_CTRL settings */ +#define PWR_CTRL1_CORE2_DOWN_RATIO(x) (((x) & 0x7) << 28) +#define PWR_CTRL1_CORE1_DOWN_RATIO(x) (((x) & 0x7) << 16) +#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9) +#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8) +#define PWR_CTRL1_USE_CORE3_WFE (1 << 7) +#define PWR_CTRL1_USE_CORE2_WFE (1 << 6) +#define PWR_CTRL1_USE_CORE1_WFE (1 << 5) +#define PWR_CTRL1_USE_CORE0_WFE (1 << 4) +#define PWR_CTRL1_USE_CORE3_WFI (1 << 3) +#define PWR_CTRL1_USE_CORE2_WFI (1 << 2) +#define PWR_CTRL1_USE_CORE1_WFI (1 << 1) +#define PWR_CTRL1_USE_CORE0_WFI (1 << 0) /* list of PLLs to be registered */ enum exynos3250_plls { @@ -168,6 +184,8 @@ static unsigned long exynos3250_cmu_clk_regs[] __initdata = { SRC_CPU, DIV_CPU0, DIV_CPU1, + PWR_CTRL1, + PWR_CTRL2, }; static int exynos3250_clk_suspend(void) @@ -748,6 +766,27 @@ static struct samsung_pll_clock exynos3250_plls[nr_plls] __initdata = { UPLL_LOCK, UPLL_CON0, NULL), }; +static void __init exynos3_core_down_clock(void) +{ + unsigned int tmp; + + /* + * Enable arm clock down (in idle) and set arm divider + * ratios in WFI/WFE state. + */ + tmp = (PWR_CTRL1_CORE2_DOWN_RATIO(7) | PWR_CTRL1_CORE1_DOWN_RATIO(7) | + PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN | + PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE | + PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI); + __raw_writel(tmp, reg_base + PWR_CTRL1); + + /* + * Disable the clock up feature on Exynos4x12, in case it was + * enabled by bootloader. + */ + __raw_writel(0x0, reg_base + PWR_CTRL2); +} + static void __init exynos3250_cmu_init(struct device_node *np) { struct samsung_clk_provider *ctx; @@ -775,6 +814,8 @@ static void __init exynos3250_cmu_init(struct device_node *np) samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks)); samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks)); + exynos3_core_down_clock(); + exynos3250_clk_sleep_init(); } CLK_OF_DECLARE(exynos3250_cmu, "samsung,exynos3250-cmu", exynos3250_cmu_init);