From patchwork Mon Jul 21 07:45:55 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 4593561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5133F9F295 for ; Mon, 21 Jul 2014 07:49:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 602C220107 for ; Mon, 21 Jul 2014 07:49:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C2A8200EC for ; Mon, 21 Jul 2014 07:49:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X98JT-0003yk-6m; Mon, 21 Jul 2014 07:47:11 +0000 Received: from mail-bn1blp0182.outbound.protection.outlook.com ([207.46.163.182] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X98JE-0003qX-Qg for linux-arm-kernel@lists.infradead.org; Mon, 21 Jul 2014 07:46:57 +0000 Received: from DM2PR03CA005.namprd03.prod.outlook.com (10.141.52.153) by BLUPR03MB344.namprd03.prod.outlook.com (10.141.48.24) with Microsoft SMTP Server (TLS) id 15.0.990.7; Mon, 21 Jul 2014 07:46:34 +0000 Received: from BL2FFO11FD025.protection.gbl (2a01:111:f400:7c09::132) by DM2PR03CA005.outlook.office365.com (2a01:111:e400:2414::25) with Microsoft SMTP Server (TLS) id 15.0.990.7 via Frontend Transport; Mon, 21 Jul 2014 07:46:34 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BL2FFO11FD025.mail.protection.outlook.com (10.173.161.104) with Microsoft SMTP Server (TLS) id 15.0.980.11 via Frontend Transport; Mon, 21 Jul 2014 07:46:33 +0000 Received: from dragon.ap.freescale.net ([10.192.185.189]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s6L7kIup008632; Mon, 21 Jul 2014 00:46:29 -0700 From: Shawn Guo To: Subject: [PATCH 3/3] ARM: imx: remove SCU standby enable code Date: Mon, 21 Jul 2014 15:45:55 +0800 Message-ID: <1405928755-19413-4-git-send-email-shawn.guo@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1405928755-19413-1-git-send-email-shawn.guo@freescale.com> References: <1405928755-19413-1-git-send-email-shawn.guo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(83072002)(21056001)(74502001)(76482001)(104016003)(87936001)(50226001)(19580405001)(44976005)(64706001)(106466001)(77982001)(6806004)(80022001)(31966008)(68736004)(20776003)(62966002)(86362001)(104166001)(92726001)(48376002)(46102001)(87286001)(102836001)(81156004)(36756003)(85852003)(19580395003)(110136001)(93916002)(79102001)(97736001)(84676001)(50986999)(76176999)(105606002)(88136002)(83322001)(81342001)(50466002)(33646002)(81542001)(85306003)(4396001)(69596002)(77156001)(229853001)(47776003)(107046002)(2351001)(74662001)(26826002)(99396002)(92566001)(95666004)(89996001); DIR:OUT; SFP:; SCL:1; SRVR:BLUPR03MB344; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 0279B3DD0D Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Shawn.Guo@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140721_004657_011928_36DB1131 X-CRM114-Status: GOOD ( 10.69 ) X-Spam-Score: -0.0 (/) Cc: Nicolas Pitre , Rob Herring , Russell King , Will Deacon , Gregory Clement , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we have scu_enable() enables SCU standby support at SCU core level, the code enabling SCU standby at i.MX platform level can be removed now. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 2 -- arch/arm/mach-imx/cpuidle-imx6q.c | 4 ---- arch/arm/mach-imx/platsmp.c | 10 ---------- 3 files changed, 16 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 22ba8973bcb9..1dabf435c592 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -98,11 +98,9 @@ void imx_set_cpu_arg(int cpu, u32 arg); void v7_secondary_startup(void); void imx_scu_map_io(void); void imx_smp_prepare(void); -void imx_scu_standby_enable(void); #else static inline void imx_scu_map_io(void) {} static inline void imx_smp_prepare(void) {} -static inline void imx_scu_standby_enable(void) {} #endif void imx_src_init(void); void imx_gpc_init(void); diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c index 10844d3bb926..aa935787b743 100644 --- a/arch/arm/mach-imx/cpuidle-imx6q.c +++ b/arch/arm/mach-imx/cpuidle-imx6q.c @@ -66,10 +66,6 @@ static struct cpuidle_driver imx6q_cpuidle_driver = { int __init imx6q_cpuidle_init(void) { - /* Need to enable SCU standby for entering WAIT modes */ - if (!cpu_is_imx6sx()) - imx_scu_standby_enable(); - /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ imx6q_set_int_mem_clk_lpm(true); diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 5b57c17c06bd..771bd25c1025 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -20,8 +20,6 @@ #include "common.h" #include "hardware.h" -#define SCU_STANDBY_ENABLE (1 << 5) - u32 g_diag_reg; static void __iomem *scu_base; @@ -45,14 +43,6 @@ void __init imx_scu_map_io(void) scu_base = IMX_IO_ADDRESS(base); } -void imx_scu_standby_enable(void) -{ - u32 val = readl_relaxed(scu_base); - - val |= SCU_STANDBY_ENABLE; - writel_relaxed(val, scu_base); -} - static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle) { imx_set_cpu_jump(cpu, v7_secondary_startup);