From patchwork Mon Jul 21 14:47:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 4595771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BEE239F295 for ; Mon, 21 Jul 2014 14:51:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F3BAB20120 for ; Mon, 21 Jul 2014 14:51:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1767220149 for ; Mon, 21 Jul 2014 14:51:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X9Ete-0002yy-Tq; Mon, 21 Jul 2014 14:48:58 +0000 Received: from mail-wg0-f45.google.com ([74.125.82.45]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X9EtM-0002SZ-O7 for linux-arm-kernel@lists.infradead.org; Mon, 21 Jul 2014 14:48:42 +0000 Received: by mail-wg0-f45.google.com with SMTP id x12so6675234wgg.16 for ; Mon, 21 Jul 2014 07:48:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1C3AjcMeMxt3FDnGb2yh94mohE4Y428uqkdHh9+TZpE=; b=Q/hmjJ6lnCw259HV5h+9XNhidlghjffcZeWQLxizh/OTq1woZ0ltZfz8o1aXA5Xq6O R/D8YyETkihFJEJ4dcL1ZGbe6BnD+cAJ7oWg9uNgjVhS3ukON6NcWIqldhfCgsbVvxUN wvYS55NB5RDfCtebRKU5Z8mOdQaoKH7i6ha4cCiPJjzz1RHl0cZnahgtWICT8FbDMkS9 mYDXdbUsLUCL5UamMdUxtQlB3MCNzKr9yCkO6QZFrkNq+K/0Ht5bYHf1X8rhn7fr75jO jalJFVqkMuKDZFWvqPFr6zU0p6N+UAtdRMp8GHY8xRc+BeOiSNP87RoAltH6sdf+EZB1 SH5g== X-Gm-Message-State: ALoCoQnhUfrJJ62c/TYPXi5OxLZGJTqe7HRc0Zsjiu+hhaklQS6+FAzsp9WMRyHzPs2/jcbDJzgR X-Received: by 10.194.191.131 with SMTP id gy3mr24025949wjc.108.1405954095228; Mon, 21 Jul 2014 07:48:15 -0700 (PDT) Received: from sundance.lan (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id di7sm38135166wjb.34.2014.07.21.07.48.13 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jul 2014 07:48:14 -0700 (PDT) From: Daniel Thompson To: Russell King , Thomas Gleixner , Jason Cooper Subject: [PATCH RFC 3/9] irqchip: gic: Remove spin locks from eoi_irq Date: Mon, 21 Jul 2014 15:47:14 +0100 Message-Id: <1405954040-30399-4-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1405954040-30399-1-git-send-email-daniel.thompson@linaro.org> References: <1405954040-30399-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140721_074840_981205_C492DB71 X-CRM114-Status: GOOD ( 12.80 ) X-Spam-Score: -0.7 (/) Cc: Marex Vasut , Daniel Thompson , linaro-kernel@lists.linaro.org, patches@linaro.org, Peter De Schrijver , Harro Haan , linux-kernel@vger.kernel.org, John Stultz , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is motivated by the comment it removes from gic_init_fiq, namely that the spin locks in eoi_irq preclude certain platforms from supporting FIQ. Currently there is only one upstream platform (tegra) that actually hooks gic_arch_extn.irq_eoi and it does not require these spin locks. Signed-off-by: Daniel Thompson Cc: Thomas Gleixner Cc: Jason Cooper Cc: Peter De Schrijver --- drivers/irqchip/irq-gic.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index d3c7559..5c934a4 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -191,11 +191,8 @@ static void gic_unmask_irq(struct irq_data *d) static void gic_eoi_irq(struct irq_data *d) { - if (gic_arch_extn.irq_eoi) { - raw_spin_lock(&irq_controller_lock); + if (gic_arch_extn.irq_eoi) gic_arch_extn.irq_eoi(d); - raw_spin_unlock(&irq_controller_lock); - } writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); } @@ -437,13 +434,6 @@ static void __init gic_init_fiq(struct gic_chip_data *gic, unsigned int i; /* - * FIQ can only be supported on platforms without an extended irq_eoi - * method (otherwise we take a lock during eoi handling). - */ - if (gic_arch_extn.irq_eoi) - return; - - /* * If grouping is not available (not implemented or prohibited by * security mode) these registers a read-as-zero/write-ignored. * However as a precaution we restore the reset default regardless of