From patchwork Wed Jul 30 18:22:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tthayer@opensource.altera.com X-Patchwork-Id: 4650981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E771FC0338 for ; Wed, 30 Jul 2014 18:19:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A0C0120145 for ; Wed, 30 Jul 2014 18:19:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 50270201B9 for ; Wed, 30 Jul 2014 18:19:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCYRK-0003w5-9J; Wed, 30 Jul 2014 18:17:26 +0000 Received: from mail-bn1lp0140.outbound.protection.outlook.com ([207.46.163.140] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCYQh-0002el-Bj for linux-arm-kernel@lists.infradead.org; Wed, 30 Jul 2014 18:16:48 +0000 Received: from dinh-ubuntu.altera.com (64.129.157.38) by BN1PR03MB123.namprd03.prod.outlook.com (10.255.201.27) with Microsoft SMTP Server (TLS) id 15.0.995.14; Wed, 30 Jul 2014 18:16:27 +0000 From: To: , , , , , , , , , , , , , , Subject: [PATCHv9 1/3] mfd: altera: Add Altera SDRAM Controller Date: Wed, 30 Jul 2014 13:22:51 -0500 Message-ID: <1406744573-609-2-git-send-email-tthayer@opensource.altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1406744573-609-1-git-send-email-tthayer@opensource.altera.com> References: <1406744573-609-1-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BN1PR02CA0028.namprd02.prod.outlook.com (10.141.56.28) To BN1PR03MB123.namprd03.prod.outlook.com (10.255.201.27) X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 0288CD37D9 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(6009001)(22564002)(199002)(189002)(50986999)(76176999)(15975445006)(33646002)(77156001)(21056001)(66066001)(104166001)(99396002)(74662001)(31966008)(15202345003)(92566001)(575784001)(74502001)(86152002)(77096002)(80022001)(76482001)(83072002)(69596002)(85852003)(48376002)(53416004)(107046002)(87976001)(62966002)(47776003)(83322001)(64706001)(88136002)(20776003)(89996001)(46102001)(79102001)(4396001)(92726001)(87286001)(93916002)(105586002)(229853001)(2201001)(77982001)(86362001)(42186005)(102836001)(101416001)(19580395003)(95666004)(19580405001)(85306003)(50226001)(81342001)(81156004)(81542001)(50466002)(106356001)(921003)(1121002)(2004002)(2101003)(83996005); DIR:OUT; SFP:; SCL:1; SRVR:BN1PR03MB123; H:dinh-ubuntu.altera.com; FPR:; MLV:nov; PTR:InfoNoRecords; MX:1; LANG:en; X-OriginatorOrg: opensource.altera.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140730_111647_558166_12C01175 X-CRM114-Status: GOOD ( 17.67 ) X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, Alan Tull , linux-kernel@vger.kernel.org, tthayer.linux@gmail.com, tthayer@opensource.altera.com, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Add a simple MFD for the Altera SDRAM Controller. Signed-off-by: Alan Tull Signed-off-by: Thor Thayer --- v1-8: The MFD implementation was not included in the original series. v9: New MFD implementation. --- MAINTAINERS | 5 ++ drivers/mfd/Kconfig | 7 ++ drivers/mfd/Makefile | 1 + drivers/mfd/altera-sdr.c | 162 ++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/altera-sdr.h | 102 +++++++++++++++++++++++++ 5 files changed, 277 insertions(+) create mode 100644 drivers/mfd/altera-sdr.c create mode 100644 include/linux/mfd/altera-sdr.h diff --git a/MAINTAINERS b/MAINTAINERS index 86efa7e..48a8923 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1340,6 +1340,11 @@ M: Dinh Nguyen S: Maintained F: drivers/clk/socfpga/ +ARM/SOCFPGA SDRAM CONTROLLER SUPPORT +M: Thor Thayer +S: Maintained +F: drivers/mfd/altera-sdr.c + ARM/STI ARCHITECTURE M: Srinivas Kandagatla M: Maxime Coquelin diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6cc4b6a..8ce4961 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -719,6 +719,13 @@ config MFD_STMPE Keypad: stmpe-keypad Touchscreen: stmpe-ts +config MFD_ALTERA_SDR + bool "Altera SDRAM Controller MFD" + depends on ARCH_SOCFPGA + select MFD_CORE + help + Support for Altera SDRAM Controller (SDR) MFD. + menu "STMicroelectronics STMPE Interface Drivers" depends on MFD_STMPE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 8afedba..24cc2b7 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -169,3 +169,4 @@ obj-$(CONFIG_MFD_AS3711) += as3711.o obj-$(CONFIG_MFD_AS3722) += as3722.o obj-$(CONFIG_MFD_STW481X) += stw481x.o obj-$(CONFIG_MFD_IPAQ_MICRO) += ipaq-micro.o +obj-$(CONFIG_MFD_ALTERA_SDR) += altera-sdr.o diff --git a/drivers/mfd/altera-sdr.c b/drivers/mfd/altera-sdr.c new file mode 100644 index 0000000..b5c6646 --- /dev/null +++ b/drivers/mfd/altera-sdr.c @@ -0,0 +1,162 @@ +/* + * SDRAM Controller (SDR) MFD + * + * Copyright (C) 2014 Altera Corporation + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#include +#include +#include +#include +#include +#include +#include + +static const struct mfd_cell altera_sdr_devs[] = { +#if defined(CONFIG_EDAC_ALTERA_MC) + { + .name = "altr_sdram_edac", + .of_compatible = "altr,sdram-edac", + }, +#endif +}; + +u32 altera_sdr_readl(struct altera_sdr *sdr, u32 reg_offset) +{ + return readl(sdr->reg_base + reg_offset); +} +EXPORT_SYMBOL_GPL(altera_sdr_readl); + +void altera_sdr_writel(struct altera_sdr *sdr, u32 reg_offset, u32 value) +{ + writel(value, sdr->reg_base + reg_offset); +} +EXPORT_SYMBOL_GPL(altera_sdr_writel); + +/* Get total memory size in bytes */ +u32 altera_sdr_mem_size(struct altera_sdr *sdr) +{ + u32 size; + u32 read_reg, row, bank, col, cs, width; + + read_reg = altera_sdr_readl(sdr, SDR_DRAMADDRW_OFST); + if (read_reg < 0) + return 0; + + width = altera_sdr_readl(sdr, SDR_DRAMIFWIDTH_OFST); + if (width < 0) + return 0; + + col = (read_reg & SDR_DRAMADDRW_COLBITS_MASK) >> + SDR_DRAMADDRW_COLBITS_LSB; + row = (read_reg & SDR_DRAMADDRW_ROWBITS_MASK) >> + SDR_DRAMADDRW_ROWBITS_LSB; + bank = (read_reg & SDR_DRAMADDRW_BANKBITS_MASK) >> + SDR_DRAMADDRW_BANKBITS_LSB; + cs = (read_reg & SDR_DRAMADDRW_CSBITS_MASK) >> + SDR_DRAMADDRW_CSBITS_LSB; + + /* Correct for ECC as its not addressible */ + if (width == SDR_DRAMIFWIDTH_32B_ECC) + width = 32; + if (width == SDR_DRAMIFWIDTH_16B_ECC) + width = 16; + + /* calculate the SDRAM size base on this info */ + size = 1 << (row + bank + col); + size = size * cs * (width / 8); + return size; +} +EXPORT_SYMBOL_GPL(altera_sdr_mem_size); + +static int altera_sdr_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct altera_sdr *sdr; + struct resource *res; + void __iomem *base; + int ret; + + sdr = devm_kzalloc(dev, sizeof(*sdr), GFP_KERNEL); + if (!sdr) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENOENT; + + base = devm_ioremap(dev, res->start, resource_size(res)); + if (!base) + return -ENOMEM; + + sdr->dev = &pdev->dev; + sdr->reg_base = base; + + ret = mfd_add_devices(sdr->dev, 0, altera_sdr_devs, + ARRAY_SIZE(altera_sdr_devs), NULL, 0, NULL); + if (ret) + dev_err(sdr->dev, "error adding devices"); + + platform_set_drvdata(pdev, sdr); + + dev_dbg(dev, "Altera SDR MFD registered\n"); + + return 0; +} + +static int altera_sdr_remove(struct platform_device *pdev) +{ + struct altera_sdr *sdr = platform_get_drvdata(pdev); + + mfd_remove_devices(sdr->dev); + + return 0; +} + +static const struct of_device_id of_altera_sdr_match[] = { + { .compatible = "altr,sdr", }, + { }, +}; + +static const struct platform_device_id altera_sdr_ids[] = { + { "altera_sdr", }, + { } +}; + +static struct platform_driver altera_sdr_driver = { + .driver = { + .name = "altera_sdr", + .owner = THIS_MODULE, + .of_match_table = of_altera_sdr_match, + }, + .probe = altera_sdr_probe, + .remove = altera_sdr_remove, + .id_table = altera_sdr_ids, +}; + +static int __init altera_sdr_init(void) +{ + return platform_driver_register(&altera_sdr_driver); +} +postcore_initcall(altera_sdr_init); + +static void __exit altera_sdr_exit(void) +{ + platform_driver_unregister(&altera_sdr_driver); +} +module_exit(altera_sdr_exit); + +MODULE_AUTHOR("Alan Tull "); +MODULE_DESCRIPTION("Altera SDRAM Controller (SDR) MFD"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/altera-sdr.h b/include/linux/mfd/altera-sdr.h new file mode 100644 index 0000000..a5f5c39 --- /dev/null +++ b/include/linux/mfd/altera-sdr.h @@ -0,0 +1,102 @@ +/* + * Copyright (C) 2014 Altera Corporation + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#ifndef __LINUX_MFD_ALTERA_SDR_H +#define __LINUX_MFD_ALTERA_SDR_H + +/* SDRAM Controller register offsets */ +#define SDR_CTLCFG_OFST 0x00 +#define SDR_DRAMADDRW_OFST 0x2C +#define SDR_DRAMIFWIDTH_OFST 0x30 +#define SDR_DRAMSTS_OFST 0x38 +#define SDR_DRAMINTR_OFST 0x3C +#define SDR_SBECOUNT_OFST 0x40 +#define SDR_DBECOUNT_OFST 0x44 +#define SDR_ERRADDR_OFST 0x48 +#define SDR_DROPCOUNT_OFST 0x4C +#define SDR_DROPADDR_OFST 0x50 +#define SDR_CTRLGRP_LOWPWREQ_OFST 0x54 +#define SDR_CTRLGRP_LOWPWRACK_OFST 0x58 + +/* SDRAM Controller CtrlCfg Register Bit Masks */ +#define SDR_CTLCFG_ECC_EN 0x400 +#define SDR_CTLCFG_ECC_CORR_EN 0x800 +#define SDR_CTLCFG_GEN_SB_ERR 0x2000 +#define SDR_CTLCFG_GEN_DB_ERR 0x4000 + +#define SDR_CTLCFG_ECC_AUTO_EN (SDR_CTLCFG_ECC_EN | \ + SDR_CTLCFG_ECC_CORR_EN) + +/* SDRAM Controller Address Widths Field Register */ +#define SDR_DRAMADDRW_COLBITS_MASK 0x001F +#define SDR_DRAMADDRW_COLBITS_LSB 0 +#define SDR_DRAMADDRW_ROWBITS_MASK 0x03E0 +#define SDR_DRAMADDRW_ROWBITS_LSB 5 +#define SDR_DRAMADDRW_BANKBITS_MASK 0x1C00 +#define SDR_DRAMADDRW_BANKBITS_LSB 10 +#define SDR_DRAMADDRW_CSBITS_MASK 0xE000 +#define SDR_DRAMADDRW_CSBITS_LSB 13 + +/* SDRAM Controller Interface Data Width Defines */ +#define SDR_DRAMIFWIDTH_16B_ECC 24 +#define SDR_DRAMIFWIDTH_32B_ECC 40 + +/* SDRAM Controller DRAM Status Register Bit Masks */ +#define SDR_DRAMSTS_SBEERR 0x04 +#define SDR_DRAMSTS_DBEERR 0x08 +#define SDR_DRAMSTS_CORR_DROP 0x10 + +/* SDRAM Controller DRAM IRQ Register Bit Masks */ +#define SDR_DRAMINTR_INTREN 0x01 +#define SDR_DRAMINTR_SBEMASK 0x02 +#define SDR_DRAMINTR_DBEMASK 0x04 +#define SDR_DRAMINTR_CORRDROPMASK 0x08 +#define SDR_DRAMINTR_INTRCLR 0x10 + +/* SDRAM Controller Single Bit Error Count Register Bit Masks */ +#define SDR_SBECOUNT_COUNT_MASK 0x0F + +/* SDRAM Controller Double Bit Error Count Register Bit Masks */ +#define SDR_DBECOUNT_COUNT_MASK 0x0F + +/* SDRAM Controller ECC Error Address Register Bit Masks */ +#define SDR_ERRADDR_ADDR_MASK 0xFFFFFFFF + +/* SDRAM Controller ECC Autocorrect Drop Count Register Bit Masks */ +#define SDR_DROPCOUNT_CORRMASK 0x0F + +/* SDRAM Controller ECC AutoCorrect Error Address Register Bit Masks */ +#define SDR_DROPADDR_ADDR_MASK 0xFFFFFFFF + +#define SELFRSHREQ_POS 3 +#define SELFRSHREQ_MASK 0x8 + +#define SELFRFSHMASK_POS 4 +#define SELFRFSHMASK_MASK 0x30 + +#define SELFRFSHACK_POS 1 +#define SELFRFSHACK_MASK 0x2 + +struct altera_sdr { + struct device *dev; + void __iomem *reg_base; +}; + +/* Register access API */ +u32 altera_sdr_readl(struct altera_sdr *sdr, u32 reg_offset); +void altera_sdr_writel(struct altera_sdr *sdr, u32 reg_offset, u32 value); +u32 altera_sdr_mem_size(struct altera_sdr *sdr); + +#endif /* __LINUX_MFD_ALTERA_SDR_H */