From patchwork Thu Jul 31 06:53:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: PranavkumarSawargaonkar X-Patchwork-Id: 4654231 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8F1F8C0338 for ; Thu, 31 Jul 2014 06:57:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C1F4A201BB for ; Thu, 31 Jul 2014 06:57:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC39320120 for ; Thu, 31 Jul 2014 06:57:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCkFo-0000S8-1k; Thu, 31 Jul 2014 06:54:20 +0000 Received: from mail-pd0-f172.google.com ([209.85.192.172]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCkFl-0000NW-Jx for linux-arm-kernel@lists.infradead.org; Thu, 31 Jul 2014 06:54:18 +0000 Received: by mail-pd0-f172.google.com with SMTP id ft15so2915946pdb.31 for ; Wed, 30 Jul 2014 23:53:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=toqndWXR1F28SRRT75alSA4n11jhsw4+oi03OzAVRg8=; b=e4Gg8YWgkkWa9A96gmIA6Pi2GSYyBKTtRt6anETJXEHz9ujRCPfPJbJ45FOfNtJOjI 24g4OIpP+VeLcYJJx/R6LFhGgsAYh1AIU2QAL9UZSVirfX1x2Yl6DOiJJvxCZiFhaNJz y8Fc7WR5QTJV+gKy76LzHbhqB1GClZJW4kotYHUvnXg24a+5yLaYcFZ4vmtWzaR8bcE3 9BO+lhRpSPhhc3DeXcWM86oX8THNxzh5rI9fP1/vn/i+NwS+959WE96ZuhiSNyWm2RVU mASPUvX/b3Rk1em1NM/3dZIw5ISJ5N0ULKq3SVMFE904G5aRt301nNKl5A3ARAdNyOQ0 4x7A== X-Gm-Message-State: ALoCoQmzVsQUP1ue/C2NrOUmBVYLg+NF0KRw6TeR8Y4rA5mS6Q3z9cWn4JEdSjdPpHvzEdbqeZTj X-Received: by 10.70.131.199 with SMTP id oo7mr1367726pdb.95.1406789635656; Wed, 30 Jul 2014 23:53:55 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id q9sm3638887pdj.2.2014.07.30.23.53.52 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 30 Jul 2014 23:53:55 -0700 (PDT) From: Pranavkumar Sawargaonkar To: kvmarm@lists.cs.columbia.edu Subject: [PATCH V2] ARM/ARM64: KVM: Nuke Hyp-mode tlbs before enabling MMU Date: Thu, 31 Jul 2014 12:23:23 +0530 Message-Id: <1406789604-10533-1-git-send-email-pranavkumar@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140730_235417_671878_A0A22B89 X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.4 (-) Cc: Anup Patel , marc.zyngier@arm.com, patches@apm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, Pranavkumar Sawargaonkar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP X-Gene u-boot runs in EL2 mode with MMU enabled hence we might have stale EL2 tlb enteris when we enable EL2 MMU on each host CPU. This can happen on any ARM/ARM64 board running bootloader in Hyp-mode (or EL2-mode) with MMU enabled. This patch ensures that we flush all Hyp-mode (or EL2-mode) TLBs on each host CPU before enabling Hyp-mode (or EL2-mode) MMU. Changelog: V2: - Flush Hyp-mode TLBs for both KVM ARM32 and KVM ARM64 at boot time V1: - Initial patch with only arm64 change Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Anup Patel Reviewed-by: Christoffer Dall Reviewed-by: Marc Zyngier Acked-by: Marc Zyngier Tested-by: Mark Rutland --- arch/arm/kvm/init.S | 4 ++++ arch/arm64/kvm/hyp-init.S | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S index 1b9844d..ee4f744 100644 --- a/arch/arm/kvm/init.S +++ b/arch/arm/kvm/init.S @@ -98,6 +98,10 @@ __do_hyp_init: mrc p15, 0, r0, c10, c2, 1 mcr p15, 4, r0, c10, c2, 1 + @ Invalidate the stale TLBs from Bootloader + mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH + dsb ish + @ Set the HSCTLR to: @ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel) @ - Endianness: Kernel config diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S index d968796..c319116 100644 --- a/arch/arm64/kvm/hyp-init.S +++ b/arch/arm64/kvm/hyp-init.S @@ -80,6 +80,10 @@ __do_hyp_init: msr mair_el2, x4 isb + /* Invalidate the stale TLBs from Bootloader */ + tlbi alle2 + dsb sy + mrs x4, sctlr_el2 and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2 ldr x5, =SCTLR_EL2_FLAGS