From patchwork Sat Aug 2 18:16:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Lynch X-Patchwork-Id: 4665311 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E07589F375 for ; Sat, 2 Aug 2014 18:21:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0D32620121 for ; Sat, 2 Aug 2014 18:21:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 774F52013D for ; Sat, 2 Aug 2014 18:21:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XDdrw-0001PV-Um; Sat, 02 Aug 2014 18:17:24 +0000 Received: from relay1.mentorg.com ([192.94.38.131]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XDdrp-0001MK-1V for linux-arm-kernel@lists.infradead.org; Sat, 02 Aug 2014 18:17:17 +0000 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1XDdrW-0004ja-Fv from Nathan_Lynch@mentor.com ; Sat, 02 Aug 2014 11:16:58 -0700 Received: from SVR-ORW-FEM-02.mgc.mentorg.com ([147.34.96.206]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Sat, 2 Aug 2014 11:16:58 -0700 Received: from localhost (147.34.91.1) by SVR-ORW-FEM-02.mgc.mentorg.com (147.34.96.168) with Microsoft SMTP Server (TLS) id 14.2.247.3; Sat, 2 Aug 2014 11:16:04 -0700 From: Nathan Lynch To: Russell King Subject: [PATCH v8 04/10] clocksource: arm_arch_timer: enable counter access for 32-bit ARM Date: Sat, 2 Aug 2014 13:16:41 -0500 Message-ID: <1407003407-31219-5-git-send-email-nathan_lynch@mentor.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1407003407-31219-1-git-send-email-nathan_lynch@mentor.com> References: <1407003407-31219-1-git-send-email-nathan_lynch@mentor.com> MIME-Version: 1.0 X-OriginalArrivalTime: 02 Aug 2014 18:16:58.0328 (UTC) FILETIME=[F2B75580:01CFAE7D] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140802_111717_109945_CD35B2E4 X-CRM114-Status: GOOD ( 13.06 ) X-Spam-Score: -0.0 (/) Cc: Steve Capper , Kees Cook , Arnd Bergmann , Ard Biesheuvel , Will Deacon , Daniel Lezcano , Stephen Boyd , Andy Lutomirski , Jan Glauber , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The only difference between arm and arm64's implementations of arch_counter_set_user_access is that 32-bit ARM does not enable user access to the virtual counter. We want to enable this access for the 32-bit ARM VDSO, so copy the arm64 version to the driver itself, giving it a slightly different name (arch_counter_set_access) to avoid redefinition. The arch_timer_evtstrm_enable hooks are also substantially similar, the only difference being a CONFIG_COMPAT-conditional section which is relevant only for arm64. Copy the arm64 version to the driver, again slightly renaming (arch_timer_evtstrm_enable => arch_timer_enable_evtstrm). With this change, the arch_counter_set_user_access and arch_timer_evtstrm_enable hooks in both arm and arm64 become unused, to be removed in followup patches. Signed-off-by: Nathan Lynch --- drivers/clocksource/arm_arch_timer.c | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index c99afdf12e98..0188332ad24b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -299,6 +300,20 @@ static void __arch_timer_setup(unsigned type, clockevents_config_and_register(clk, arch_timer_rate, 0xf, 0x7fffffff); } +static void arch_timer_enable_evtstrm(int divider) +{ + u32 cntkctl = arch_timer_get_cntkctl(); + cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK; + /* Set the divider and enable virtual event stream */ + cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT) + | ARCH_TIMER_VIRT_EVT_EN; + arch_timer_set_cntkctl(cntkctl); + elf_hwcap |= HWCAP_EVTSTRM; +#ifdef CONFIG_COMPAT + compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM; +#endif +} + static void arch_timer_configure_evtstream(void) { int evt_stream_div, pos; @@ -309,7 +324,24 @@ static void arch_timer_configure_evtstream(void) if (pos > 1 && !(evt_stream_div & (1 << (pos - 2)))) pos--; /* enable event stream */ - arch_timer_evtstrm_enable(min(pos, 15)); + arch_timer_enable_evtstrm(min(pos, 15)); +} + +static void arch_counter_set_access(void) +{ + u32 cntkctl = arch_timer_get_cntkctl(); + + /* Disable user access to the timers and the physical counter */ + /* Also disable virtual event stream */ + cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN + | ARCH_TIMER_USR_VT_ACCESS_EN + | ARCH_TIMER_VIRT_EVT_EN + | ARCH_TIMER_USR_PCT_ACCESS_EN); + + /* Enable user access to the virtual counter */ + cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; + + arch_timer_set_cntkctl(cntkctl); } static int arch_timer_setup(struct clock_event_device *clk) @@ -324,7 +356,7 @@ static int arch_timer_setup(struct clock_event_device *clk) enable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], 0); } - arch_counter_set_user_access(); + arch_counter_set_access(); if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM)) arch_timer_configure_evtstream();