diff mbox

ARM: dts: Gateworks GW5520 support (i.MX6)

Message ID 1407572602-14017-1-git-send-email-tharvey@gateworks.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tim Harvey Aug. 9, 2014, 8:23 a.m. UTC
Add support for the Gateworks GW5520 board.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 arch/arm/boot/dts/Makefile            |   2 +
 arch/arm/boot/dts/imx6dl-gw552x.dts   |  20 +++
 arch/arm/boot/dts/imx6q-gw552x.dts    |  24 +++
 arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 282 ++++++++++++++++++++++++++++++++++
 4 files changed, 328 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
 create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
 create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi

Comments

Tony Prisk Aug. 9, 2014, 9:20 a.m. UTC | #1
On 09/08/14 20:23, Tim Harvey wrote:
> Add support for the Gateworks GW5520 board.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>   arch/arm/boot/dts/Makefile            |   2 +
>   arch/arm/boot/dts/imx6dl-gw552x.dts   |  20 +++
>   arch/arm/boot/dts/imx6q-gw552x.dts    |  24 +++
>   arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 282 ++++++++++++++++++++++++++++++++++
>   4 files changed, 328 insertions(+)
>   create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
>   create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
>   create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
...

> diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
> new file mode 100644
> index 0000000..a4b700c
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
> @@ -0,0 +1,20 @@
> +/*
> + * Copyright 2014 Gateworks Corporation
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6dl.dtsi"
> +#include "imx6qdl-gw552x.dtsi"
> +
> +/ {
> +	model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
> +	compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
> +};
I don't see 'gw' in the device tree vendor prefixes, so it should to be 
added to Documentation/devicetree/bindings/vendor-prefixes.txt as well.

Regards
Tony Prisk
Javier Martinez Canillas Aug. 9, 2014, 11:44 a.m. UTC | #2
Hello Tim,

On Sat, Aug 9, 2014 at 10:23 AM, Tim Harvey <tharvey@gateworks.com> wrote:
> +/*
> + * Copyright 2014 Gateworks Corporation
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */

There was a discussion [0] recently about what license(s) should be
used for Device Tree source files. It seems that we have been using
GPLv2-only just because is the Linux kernel license but unlike other
source files, the DTS could be used verbatim in other operating
systems / bootloaders so we have to better think the implications of
the licensing.

Of course this shouldn't hold your patch, I'm just mentioning so you
can keep an eye in case an agreement is made while you are pushing
this.

> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> +       /* these are used by bootloader for disabling nodes */
> +       aliases {
> +               led0 = &led0;
> +               led1 = &led1;
> +               led2 = &led2;
> +               nand = &gpmi;
> +               usb0 = &usbh1;
> +               usb1 = &usbotg;
> +       };
> +
> +       chosen {
> +               bootargs = "console=ttymxc1,115200";
> +       };
> +
> +       leds {
> +               compatible = "gpio-leds";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> +               led0: user1 {
> +                       label = "user1";
> +                       gpios = <&gpio4 6 0>; /* MX6_PANLEDG */

You are already including <dt-bindings/gpio/gpio.h> so please use the
GPIO constants instead of magic numbers (e.g: GPIO_ACTIVE_HIGH in this
case). Same for others gpios properties.

> +                       default-state = "on";
> +                       linux,default-trigger = "heartbeat";
> +               };
> +
> +               led1: user2 {
> +                       label = "user2";
> +                       gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
> +                       default-state = "off";
> +               };
> +
> +               led2: user3 {
> +                       label = "user3";
> +                       gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
> +                       default-state = "off";
> +               };
> +       };
> +

Overall, looks good to me. After the changes mentioned above:

Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>

[0]: http://www.spinics.net/lists/devicetree/msg44439.html
Tim Harvey Aug. 10, 2014, 8:01 a.m. UTC | #3
On Sat, Aug 9, 2014 at 4:44 AM, Javier Martinez Canillas
<javier@dowhile0.org> wrote:
> Hello Tim,
>
> On Sat, Aug 9, 2014 at 10:23 AM, Tim Harvey <tharvey@gateworks.com> wrote:
>> +/*
>> + * Copyright 2014 Gateworks Corporation
>> + *
>> + * The code contained herein is licensed under the GNU General Public
>> + * License. You may obtain a copy of the GNU General Public License
>> + * Version 2 or later at the following locations:
>> + *
>> + * http://www.opensource.org/licenses/gpl-license.html
>> + * http://www.gnu.org/copyleft/gpl.html
>> + */
>
> There was a discussion [0] recently about what license(s) should be
> used for Device Tree source files. It seems that we have been using
> GPLv2-only just because is the Linux kernel license but unlike other
> source files, the DTS could be used verbatim in other operating
> systems / bootloaders so we have to better think the implications of
> the licensing.
>
> Of course this shouldn't hold your patch, I'm just mentioning so you
> can keep an eye in case an agreement is made while you are pushing
> this.

Javier,

Thanks for pointing this out - The discussion makes sense. I'll try to
keep an eye on it.

>
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +
>> +/ {
>> +       /* these are used by bootloader for disabling nodes */
>> +       aliases {
>> +               led0 = &led0;
>> +               led1 = &led1;
>> +               led2 = &led2;
>> +               nand = &gpmi;
>> +               usb0 = &usbh1;
>> +               usb1 = &usbotg;
>> +       };
>> +
>> +       chosen {
>> +               bootargs = "console=ttymxc1,115200";
>> +       };
>> +
>> +       leds {
>> +               compatible = "gpio-leds";
>> +               pinctrl-names = "default";
>> +               pinctrl-0 = <&pinctrl_gpio_leds>;
>> +
>> +               led0: user1 {
>> +                       label = "user1";
>> +                       gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
>
> You are already including <dt-bindings/gpio/gpio.h> so please use the
> GPIO constants instead of magic numbers (e.g: GPIO_ACTIVE_HIGH in this
> case). Same for others gpios properties.

Agreed - I will change this for v2.

>
>> +                       default-state = "on";
>> +                       linux,default-trigger = "heartbeat";
>> +               };
>> +
>> +               led1: user2 {
>> +                       label = "user2";
>> +                       gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
>> +                       default-state = "off";
>> +               };
>> +
>> +               led2: user3 {
>> +                       label = "user3";
>> +                       gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
>> +                       default-state = "off";
>> +               };
>> +       };
>> +
>
> Overall, looks good to me. After the changes mentioned above:
>
> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
>
> [0]: http://www.spinics.net/lists/devicetree/msg44439.html

Thanks for the review.

Regards,

Tim
Shawn Guo Aug. 18, 2014, 6:35 a.m. UTC | #4
On Sat, Aug 09, 2014 at 01:23:22AM -0700, Tim Harvey wrote:
> +&iomuxc {

If you do not mind, I would ask you to put iomuxc node at the bottom of
the file.  Doing so makes the file a bit easier to read.

> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_hog>;
> +
> +	imx6qdl-gw552x {
> +		pinctrl_hog: hoggrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* USBHUB_RST# */
> +				MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIESKT_WDIS# */

Please use a proper pad configuration value instead of 0x80000000, which
will rely on the hardware reset state or what bootloader configures.

Also, can these two pins be moved to some pinctrl entries used by
particular client device?

> +			>;
> +		};
> +
> +		pinctrl_gpmi_nand: gpminandgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
> +				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
> +				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
> +				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
> +				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
> +				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
> +				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
> +				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
> +				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
> +				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
> +				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
> +				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
> +				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
> +				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
> +				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
> +				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
> +			>;
> +		};
> +
> +		pinctrl_i2c1: i2c1grp {
> +			fsl,pins = <
> +				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
> +				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c2: i2c2grp {
> +			fsl,pins = <
> +				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
> +				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c3: i2c3grp {
> +			fsl,pins = <
> +				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
> +				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_pcie: pciegrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE_RST# */

Fix 0x80000000.

> +			>;
> +		};
> +
> +		pinctrl_uart2: uart2grp {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
> +				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_uart3: uart3grp {
> +			fsl,pins = <
> +				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
> +				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_uart5: uart5grp {
> +			fsl,pins = <
> +				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
> +				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
> +			>;
> +		};
> +	};
> +
> +        gpio_leds {

This node can just be saved by putting gpioledsgrp into imx6qdl-gw552x.
> +                pinctrl_gpio_leds: gpioledsgrp {
> +                        fsl,pins = <

Use tab for indentation.

> +				MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
> +				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
> +				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */

Fix 0x80000000.

Shawn

> +                        >;
> +                };
> +        };
> +
> +};
> +
> +&pcie {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pcie>;
> +	reset-gpio = <&gpio1 29 0>;
> +	status = "okay";
> +};
> +
> +&uart2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart2>;
> +	status = "okay";
> +};
> +
> +&uart3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart3>;
> +	status = "okay";
> +};
> +
> +&uart5 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart5>;
> +	status = "okay";
> +};
> +
> +&usbh1 {
> +	status = "okay";
> +};
> -- 
> 1.8.3.2
>
Tim Harvey Aug. 19, 2014, 3:17 p.m. UTC | #5
On Sun, Aug 17, 2014 at 11:35 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
> On Sat, Aug 09, 2014 at 01:23:22AM -0700, Tim Harvey wrote:
>> +&iomuxc {
>
> If you do not mind, I would ask you to put iomuxc node at the bottom of
> the file.  Doing so makes the file a bit easier to read.

will do

>
>> +     pinctrl-names = "default";
>> +     pinctrl-0 = <&pinctrl_hog>;
>> +
>> +     imx6qdl-gw552x {
>> +             pinctrl_hog: hoggrp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* USBHUB_RST# */
>> +                             MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIESKT_WDIS# */
>
> Please use a proper pad configuration value instead of 0x80000000, which
> will rely on the hardware reset state or what bootloader configures.

will do

>
> Also, can these two pins be moved to some pinctrl entries used by
> particular client device?

Do you know of any appropriate bindings for a USB hub reset signal?
This does get configured and used properly in the bootloader but I
thought the common belief was that GPIO's should get configured in the
kernel as well (and of course I will use a value other than 0x8000000
so that its pinmuxed and padconf'd).

The PCISKT_WDIS# is a gpio that routes to the miniPCIe socket(s) WDIS#
signal. While no kernel driver uses it I think its valuable to
document to users such that they can export it and use it for rfkill
of wireless devices that may be placed in those sockets. I'm not aware
of a proper binding for an rfkill pin either.

If no bindings exist, are you saying these should be dropped and thus
functionality hidden from a user possibly trying to use them from
userspace through gpio-sysfs or are you saying they should be moved
into pinctrl groups for logical grouping?

>
>> +                     >;
>> +             };
>> +
>> +             pinctrl_gpmi_nand: gpminandgrp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
>> +                             MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
>> +                             MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
>> +                             MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
>> +                             MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
>> +                             MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
>> +                             MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
>> +                             MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
>> +                             MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
>> +                             MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
>> +                     >;
>> +             };
>> +
>> +             pinctrl_i2c1: i2c1grp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
>> +                             MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
>> +                     >;
>> +             };
>> +
>> +             pinctrl_i2c2: i2c2grp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
>> +                             MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
>> +                     >;
>> +             };
>> +
>> +             pinctrl_i2c3: i2c3grp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
>> +                             MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
>> +                     >;
>> +             };
>> +
>> +             pinctrl_pcie: pciegrp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE_RST# */
>
> Fix 0x80000000.

will do

>
>> +                     >;
>> +             };
>> +
>> +             pinctrl_uart2: uart2grp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
>> +                             MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
>> +                     >;
>> +             };
>> +
>> +             pinctrl_uart3: uart3grp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
>> +                             MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
>> +                     >;
>> +             };
>> +
>> +             pinctrl_uart5: uart5grp {
>> +                     fsl,pins = <
>> +                             MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
>> +                             MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
>> +                     >;
>> +             };
>> +     };
>> +
>> +        gpio_leds {
>
> This node can just be saved by putting gpioledsgrp into imx6qdl-gw552x.
>> +                pinctrl_gpio_leds: gpioledsgrp {
>> +                        fsl,pins = <

ok - that makes sense, will do.

>
> Use tab for indentation.

oops - I guess checkpatch.pl doesn't catch that on dts/dtsi files

>
>> +                             MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
>> +                             MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
>> +                             MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
>
> Fix 0x80000000.

will do

>
> Shawn
>

Thanks for the review!

Tim
Shawn Guo Aug. 22, 2014, 7:43 a.m. UTC | #6
On Tue, Aug 19, 2014 at 08:17:03AM -0700, Tim Harvey wrote:
> Do you know of any appropriate bindings for a USB hub reset signal?
> This does get configured and used properly in the bootloader but I
> thought the common belief was that GPIO's should get configured in the
> kernel as well (and of course I will use a value other than 0x8000000
> so that its pinmuxed and padconf'd).
> 
> The PCISKT_WDIS# is a gpio that routes to the miniPCIe socket(s) WDIS#
> signal. While no kernel driver uses it I think its valuable to
> document to users such that they can export it and use it for rfkill
> of wireless devices that may be placed in those sockets. I'm not aware
> of a proper binding for an rfkill pin either.
> 
> If no bindings exist, are you saying these should be dropped and thus
> functionality hidden from a user possibly trying to use them from
> userspace through gpio-sysfs or are you saying they should be moved
> into pinctrl groups for logical grouping?

Oh, I was wondering if these GPIOs can be put into USB and PCIe
pingroup.  But if you think it doesn't make sense to do so, I'm fine
with them being in hoggrp, after all it seems we do not have a proper
binding existing for them.

Shawn
diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@  dtb-$(CONFIG_ARCH_MXC) += \
 	imx6dl-gw52xx.dtb \
 	imx6dl-gw53xx.dtb \
 	imx6dl-gw54xx.dtb \
+	imx6dl-gw552x.dtb \
 	imx6dl-hummingboard.dtb \
 	imx6dl-nitrogen6x.dtb \
 	imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@  dtb-$(CONFIG_ARCH_MXC) += \
 	imx6q-gw53xx.dtb \
 	imx6q-gw5400-a.dtb \
 	imx6q-gw54xx.dtb \
+	imx6q-gw552x.dtb \
 	imx6q-nitrogen6x.dtb \
 	imx6q-phytec-pbab01.dtb \
 	imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@ 
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+	model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+	compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@ 
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+	model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+	compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..a117e5c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,282 @@ 
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	/* these are used by bootloader for disabling nodes */
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		led2 = &led2;
+		nand = &gpmi;
+		usb0 = &usbh1;
+		usb1 = &usbotg;
+	};
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_leds>;
+
+		led0: user1 {
+			label = "user1";
+			gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
+			default-state = "on";
+			linux,default-trigger = "heartbeat";
+		};
+
+		led1: user2 {
+			label = "user2";
+			gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
+			default-state = "off";
+		};
+
+		led2: user3 {
+			label = "user3";
+			gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
+			default-state = "off";
+		};
+	};
+
+	memory {
+		reg = <0x10000000 0x20000000>;
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_1p0v: regulator@0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "1P0V";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-always-on;
+		};
+
+		reg_3p3v: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "3P3V";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_5p0v: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "5P0V";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			regulator-always-on;
+		};
+	};
+};
+
+&gpmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpmi_nand>;
+	status = "okay";
+};
+
+&hdmi {
+	ddc-i2c-bus = <&i2c3>;
+	status = "okay";
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	eeprom1: eeprom@50 {
+		compatible = "atmel,24c02";
+		reg = <0x50>;
+		pagesize = <16>;
+	};
+
+	eeprom2: eeprom@51 {
+		compatible = "atmel,24c02";
+		reg = <0x51>;
+		pagesize = <16>;
+	};
+
+	eeprom3: eeprom@52 {
+		compatible = "atmel,24c02";
+		reg = <0x52>;
+		pagesize = <16>;
+	};
+
+	eeprom4: eeprom@53 {
+		compatible = "atmel,24c02";
+		reg = <0x53>;
+		pagesize = <16>;
+	};
+
+	gpio: pca9555@23 {
+		compatible = "nxp,pca9555";
+		reg = <0x23>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	rtc: ds1672@68 {
+		compatible = "dallas,ds1672";
+		reg = <0x68>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+};
+
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog>;
+
+	imx6qdl-gw552x {
+		pinctrl_hog: hoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* USBHUB_RST# */
+				MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIESKT_WDIS# */
+			>;
+		};
+
+		pinctrl_gpmi_nand: gpminandgrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
+				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
+				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
+				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
+				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
+				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
+				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
+				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
+				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
+				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
+				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
+				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
+				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
+				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
+				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
+				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
+			>;
+		};
+
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
+				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_pcie: pciegrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE_RST# */
+			>;
+		};
+
+		pinctrl_uart2: uart2grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
+				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_uart3: uart3grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_uart5: uart5grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
+			>;
+		};
+	};
+
+        gpio_leds {
+                pinctrl_gpio_leds: gpioledsgrp {
+                        fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
+				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
+				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
+                        >;
+                };
+        };
+
+};
+
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio1 29 0>;
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	status = "okay";
+};
+
+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart5>;
+	status = "okay";
+};
+
+&usbh1 {
+	status = "okay";
+};