From patchwork Tue Aug 12 07:26:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 4711631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 064489F38D for ; Tue, 12 Aug 2014 07:16:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0700D2014A for ; Tue, 12 Aug 2014 07:16:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B66520127 for ; Tue, 12 Aug 2014 07:16:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XH6II-00050w-Ff; Tue, 12 Aug 2014 07:14:54 +0000 Received: from szxga03-in.huawei.com ([119.145.14.66]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XH6IE-0004Ix-7v for linux-arm-kernel@lists.infradead.org; Tue, 12 Aug 2014 07:14:51 +0000 Received: from 172.24.2.119 (EHLO szxeml421-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id ASY16134; Tue, 12 Aug 2014 15:03:06 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml421-hub.china.huawei.com (10.82.67.160) with Microsoft SMTP Server id 14.3.158.1; Tue, 12 Aug 2014 15:02:56 +0800 From: Yijing Wang To: Bjorn Helgaas Subject: [RFC PATCH 20/20] PCI/MSI: Clean up unused MSI arch functions Date: Tue, 12 Aug 2014 15:26:13 +0800 Message-ID: <1407828373-24322-21-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> References: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020204.53E9BC2B.00AD,ss=1,re=0.000,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2011-05-27 18:58:46 X-Mirapoint-Loop-Id: 0f8b2a1517148dfe051092ab20b7c295 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140812_001451_091100_56349E6A X-CRM114-Status: GOOD ( 18.47 ) X-Spam-Score: -1.4 (-) Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Xinwei Hu , Yijing Wang , "H. Peter Anvin" , sparclinux@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Konrad Rzeszutek Wilk , Marc Zyngier , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Tony Luck , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now we use struct msi_chip in all platforms to configure MSI/MSI-X. We can clean up the unused arch functions. Signed-off-by: Yijing Wang --- drivers/pci/msi.c | 82 ++++++++++++++++++++-------------------------------- 1 files changed, 32 insertions(+), 50 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index feba5dd..2d2d4cd 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -41,33 +41,7 @@ struct msi_chip * __weak arch_get_match_msi_chip(struct device *dev) return NULL; } -int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) -{ - int err; - struct msi_chip *chip = arch_get_match_msi_chip(&dev->dev); - - if (!chip || !chip->setup_irq) - return -EINVAL; - - err = chip->setup_irq(&dev->dev, desc); - if (err < 0) - return err; - - return 0; -} - -void __weak arch_teardown_msi_irq(unsigned int irq) -{ - struct msi_desc *entry = irq_get_msi_desc(irq); - struct msi_chip *chip = arch_get_match_msi_chip(&entry->dev->dev); - - if (!chip || !chip->teardown_irq) - return; - - chip->teardown_irq(irq); -} - -int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type) +static int msi_check_device(struct pci_dev *dev, int nvec, int type) { struct msi_chip *chip = arch_get_match_msi_chip(&dev->dev); @@ -77,25 +51,31 @@ int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type) return chip->check_device(&dev->dev, nvec, type); } -int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +static int setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { struct msi_desc *entry; int ret; struct msi_chip *chip; chip = arch_get_match_msi_chip(&dev->dev); - if (chip && chip->setup_irqs) + if (!chip) + return -EINVAL; + + if (chip->setup_irqs) return chip->setup_irqs(&dev->dev, nvec, type); /* * If an architecture wants to support multiple MSI, it needs to - * override arch_setup_msi_irqs() + * provide chip->setup_irqs() */ if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; + if (!chip->setup_irq) + return -EINVAL; + list_for_each_entry(entry, &dev->msi_list, list) { - ret = arch_setup_msi_irq(dev, entry); + ret = chip->setup_irq(&dev->dev, entry); if (ret < 0) return ret; if (ret > 0) @@ -105,13 +85,20 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) return 0; } -/* - * We have a default implementation available as a separate non-weak - * function, as it is used by the Xen x86 PCI code - */ -void default_teardown_msi_irqs(struct pci_dev *dev) +static void teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *entry; + struct msi_chip *chip; + + chip = arch_get_match_msi_chip(&dev->dev); + if (!chip) + return; + + if (chip->teardown_irqs) + return chip->teardown_irqs(&dev->dev); + + if (!chip->teardown_irq) + return; list_for_each_entry(entry, &dev->msi_list, list) { int i, nvec; @@ -122,15 +109,10 @@ void default_teardown_msi_irqs(struct pci_dev *dev) else nvec = 1 << entry->msi_attrib.multiple; for (i = 0; i < nvec; i++) - arch_teardown_msi_irq(entry->irq + i); + chip->teardown_irq(entry->irq + i); } } -void __weak arch_teardown_msi_irqs(struct pci_dev *dev) -{ - return default_teardown_msi_irqs(dev); -} - static void default_restore_msi_irq(struct pci_dev *dev, int irq) { struct msi_desc *entry; @@ -149,9 +131,9 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq) write_msi_msg(irq, &entry->msg); } -void __weak arch_restore_msi_irqs(struct pci_dev *dev) +static void restore_msi_irqs(struct pci_dev *dev) { - struct msi_chip *chip = arch_get_msi_chip(&dev->dev); + struct msi_chip *chip = arch_get_match_msi_chip(&dev->dev); if (chip && chip->restore_irqs) return chip->restore_irqs(&dev->dev); @@ -386,7 +368,7 @@ static void free_msi_irqs(struct pci_dev *dev) BUG_ON(irq_has_action(entry->irq + i)); } - arch_teardown_msi_irqs(dev); + teardown_msi_irqs(dev); list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { if (entry->msi_attrib.is_msix) { @@ -456,7 +438,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev) pci_intx_for_msi(dev, 0); msi_set_enable(dev, 0); - arch_restore_msi_irqs(dev); + restore_msi_irqs(dev); pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap), @@ -479,7 +461,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev) msix_clear_and_set_ctrl(dev, 0, PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); - arch_restore_msi_irqs(dev); + restore_msi_irqs(dev); list_for_each_entry(entry, &dev->msi_list, list) { msix_mask_irq(entry, entry->masked); } @@ -650,7 +632,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) list_add_tail(&entry->list, &dev->msi_list); /* Configure MSI capability structure */ - ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); + ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); if (ret) { msi_mask_irq(entry, mask, ~mask); free_msi_irqs(dev); @@ -766,7 +748,7 @@ static int msix_capability_init(struct pci_dev *dev, if (ret) return ret; - ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); + ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); if (ret) goto out_avail; @@ -853,7 +835,7 @@ static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type) if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) return -EINVAL; - ret = arch_msi_check_device(dev, nvec, type); + ret = msi_check_device(dev, nvec, type); if (ret) return ret;