From patchwork Tue Aug 19 15:16:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 4744131 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DC941C0338 for ; Tue, 19 Aug 2014 15:21:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9572D2011D for ; Tue, 19 Aug 2014 15:21:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A508200D7 for ; Tue, 19 Aug 2014 15:21:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XJlBU-0007hc-I7; Tue, 19 Aug 2014 15:18:52 +0000 Received: from mail-we0-f169.google.com ([74.125.82.169]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XJlAF-0006MH-2W for linux-arm-kernel@lists.infradead.org; Tue, 19 Aug 2014 15:17:36 +0000 Received: by mail-we0-f169.google.com with SMTP id u56so6655984wes.0 for ; Tue, 19 Aug 2014 08:17:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zNCIQVJui8xXo0aIq3pL/d8+tX9gIWmry9HFNM1qUXo=; b=Eqg91diyz2E9FVyTFWMrAII/LX/g4/kJayO/8XKPf2JiF2il9edJd5MV+uWGmLrtGu TPGtqqEVj/0leNC+2Yi1QE2Gpvaljd4lRv4NQI7GVSifEjrebquSyYKiAEwZueFPOnft /DT3FoY4AM9yfvO2PzKao4QCKJc66hUvY9Qr++Vb0pRSV8LOf7Vnw3WQ6zSMuF19E3Ig EWN/lweDq/h70ylwddndjwXaGdW5xb3gCa5oltL5W5CxcSm6sQonOnc3iZ/hxAWyQsCn ehTCRDvRVTirPjnnqF1wpG0kqt1aV5KCJOKYI+eba2AtAPU4daNCyX2LcPOmQ80ts8iP jLWA== X-Gm-Message-State: ALoCoQk8mOGmm73JIdN2yOXyKrQIPYkAGkmfb3fBDhh+DwtQKFdWMNYfx1EIqKSfmDncl/Yn3V77 X-Received: by 10.180.210.231 with SMTP id mx7mr7476929wic.42.1408461432734; Tue, 19 Aug 2014 08:17:12 -0700 (PDT) Received: from sundance.lan (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id f5sm7529192wib.18.2014.08.19.08.17.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Aug 2014 08:17:12 -0700 (PDT) From: Daniel Thompson To: Russell King Subject: [PATCH v9 7/9] arm: sa1100: Migrate DEBUG_LL macros to shared directory Date: Tue, 19 Aug 2014 16:16:45 +0100 Message-Id: <1408461407-10429-8-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1408461407-10429-1-git-send-email-daniel.thompson@linaro.org> References: <1408459715-10151-1-git-send-email-daniel.thompson@linaro.org> <1408461407-10429-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140819_081735_442242_E1123E2F X-CRM114-Status: GOOD ( 17.26 ) X-Spam-Score: -0.7 (/) Cc: Paul Bolle , linaro-kernel@lists.linaro.org, Arnd Bergmann , patches@linaro.org, spear-devel@list.st.com, Daniel Thompson , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As part of the migration we copy a few definitions from the mach-sa1100 headers and replace the automatic serial port detectiion with explicit configuration based on DEBUG_UART_PHYS/DEBUG_UART_VIRT. The removal of the automatic configuration is similar to the way migration was handled for OMAP2 (see 808b7e07464d...). Signed-off-by: Daniel Thompson Cc: Russell King --- arch/arm/Kconfig.debug | 41 ++++++++++++++-- arch/arm/include/debug/sa1100.S | 37 +++++++++++++++ arch/arm/mach-sa1100/include/mach/debug-macro.S | 62 ------------------------- 3 files changed, 75 insertions(+), 65 deletions(-) create mode 100644 arch/arm/include/debug/sa1100.S delete mode 100644 arch/arm/mach-sa1100/include/mach/debug-macro.S diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index d71427e..227ae88 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -762,6 +762,30 @@ choice their output to UART 2. The port must have been initialised by the boot-loader before use. + config DEBUG_SA1100_UART1 + depends on ARCH_SA1100 + select DEBUG_SA1100_UART + bool "Kernel low-level debugging messages via SA1100 Ser1" + help + Say Y here if you want kernel low-level debugging support + on SA1100 based platforms. + + config DEBUG_SA1100_UART2 + depends on ARCH_SA1100 + select DEBUG_SA1100_UART + bool "Kernel low-level debugging messages via SA1100 Ser2" + help + Say Y here if you want kernel low-level debugging support + on SA1100 based platforms. + + config DEBUG_SA1100_UART3 + depends on ARCH_SA1100 + select DEBUG_SA1100_UART + bool "Kernel low-level debugging messages via SA1100 Ser3" + help + Say Y here if you want kernel low-level debugging support + on SA1100 based platforms. + config DEBUG_SOCFPGA_UART depends on ARCH_SOCFPGA bool "Use SOCFPGA UART for low-level debug" @@ -1057,6 +1081,10 @@ config DEBUG_TEGRA_UART bool depends on ARCH_TEGRA +config DEBUG_SA1100_UART + bool + depends on ARCH_SA1100 + config DEBUG_STI_UART bool depends on ARCH_STI @@ -1086,6 +1114,7 @@ config DEBUG_LL_INCLUDE default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART default "debug/s5pv210.S" if DEBUG_S5PV210_UART + default "debug/sa1100.S" if DEBUG_SA1100_UART default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 default "debug/sti.S" if DEBUG_STI_UART default "debug/tegra.S" if DEBUG_TEGRA_UART @@ -1105,7 +1134,7 @@ config DEBUG_UART_PL01X ARCH_SPEAR13XX || \ ARCH_VERSATILE -# Compatibility options for 8250 +#Compatibility options for 8250 config DEBUG_UART_8250 def_bool ARCH_DOVE || ARCH_EBSA110 || \ (FOOTBRIDGE && !DEBUG_DC21285_PORT) || \ @@ -1151,6 +1180,9 @@ config DEBUG_UART_PHYS default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \ DEBUG_S3C2410_UART2) default 0x7c0003f8 if FOOTBRIDGE + default 0x80010000 if DEBUG_SA1100_UART1 + default 0x80030000 if DEBUG_SA1100_UART2 + default 0x80050000 if DEBUG_SA1100_UART3 default 0x80070000 if DEBUG_IMX23_UART default 0x80074000 if DEBUG_IMX28_UART default 0x80230000 if DEBUG_PICOXCELL_UART @@ -1187,7 +1219,7 @@ config DEBUG_UART_PHYS DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || \ DEBUG_MSM_UART || DEBUG_NETX_UART || DEBUG_QCOM_UARTDM || \ - DEBUG_S3C24XX_UART + DEBUG_S3C24XX_UART || DEBUG_SA1100_UART config DEBUG_UART_VIRT hex "Virtual base address of debug UART" @@ -1215,6 +1247,9 @@ config DEBUG_UART_VIRT DEBUG_S3C2410_UART2) default 0xf7fc9000 if DEBUG_BERLIN_UART default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9 + default 0xf8010000 if DEBUG_SA1100_UART1 + default 0xf8030000 if DEBUG_SA1100_UART2 + default 0xf8050000 if DEBUG_SA1100_UART3 default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1 default 0xfa71e000 if DEBUG_QCOM_UARTDM default 0xfb009000 if DEBUG_REALVIEW_STD_PORT @@ -1260,7 +1295,7 @@ config DEBUG_UART_VIRT depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || \ DEBUG_MSM_UART || DEBUG_NETX_UART || DEBUG_QCOM_UARTDM || \ - DEBUG_S3C24XX_UART + DEBUG_S3C24XX_UART || DEBUG_SA1100_UART config DEBUG_UART_8250_SHIFT int "Register offset shift for the 8250 debug UART" diff --git a/arch/arm/include/debug/sa1100.S b/arch/arm/include/debug/sa1100.S new file mode 100644 index 0000000..6b5e1ce --- /dev/null +++ b/arch/arm/include/debug/sa1100.S @@ -0,0 +1,37 @@ +/* + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#define UTDR 0x14 +#define UTSR1 0x20 +#define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ +#define UTSR1_TNF 0x00000004 /* Transmit FIFO Not Full (read) */ + + .macro addruart, rp, rv, tmp + ldr \rp, =CONFIG_DEBUG_UART_PHYS + ldr \rv, =CONFIG_DEBUG_UART_VIRT + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UTDR] + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #UTSR1] + tst \rd, #UTSR1_TNF + beq 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #UTSR1] + tst \rd, #UTSR1_TBY + bne 1001b + .endm diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S deleted file mode 100644 index 530772d..0000000 --- a/arch/arm/mach-sa1100/include/mach/debug-macro.S +++ /dev/null @@ -1,62 +0,0 @@ -/* arch/arm/mach-sa1100/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ -#include - - .macro addruart, rp, rv, tmp - mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - moveq \rp, #0x80000000 @ physical base address - movne \rp, #0xf8000000 @ virtual address - - @ We probe for the active serial port here, coherently with - @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h. - @ We assume r1 can be clobbered. - - @ see if Ser3 is active - add \rp, \rp, #0x00050000 - ldr \rv, [\rp, #UTCR3] - tst \rv, #UTCR3_TXE - - @ if Ser3 is inactive, then try Ser1 - addeq \rp, \rp, #(0x00010000 - 0x00050000) - ldreq \rv, [\rp, #UTCR3] - tsteq \rv, #UTCR3_TXE - - @ if Ser1 is inactive, then try Ser2 - addeq \rp, \rp, #(0x00030000 - 0x00010000) - ldreq \rv, [\rp, #UTCR3] - tsteq \rv, #UTCR3_TXE - - @ clear top bits, and generate both phys and virt addresses - lsl \rp, \rp, #8 - lsr \rp, \rp, #8 - orr \rv, \rp, #0xf8000000 @ virtual - orr \rp, \rp, #0x80000000 @ physical - - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #UTDR] - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #UTSR1] - tst \rd, #UTSR1_TNF - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #UTSR1] - tst \rd, #UTSR1_TBY - bne 1001b - .endm