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[v3,1/3] of: Add NVIDIA Tegra flow controller bindings

Message ID 1409033644-24376-1-git-send-email-thierry.reding@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Thierry Reding Aug. 26, 2014, 6:14 a.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Add device tree bindings for the flow controller found on NVIDIA Tegra
SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v3:
- collapse identical bindings into a single file

 .../bindings/arm/tegra/nvidia,tegra20-flowctrl.txt           | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt

Comments

Stephen Warren Aug. 26, 2014, 5:49 p.m. UTC | #1 
On 08/26/2014 12:14 AM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Add device tree bindings for the flow controller found on NVIDIA Tegra
> SoCs.

I have applied patches 1,3 to Tegra's for-3.18/soc branch, and patch 2 
to Tegra's for-3.18/dt branch.
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Patch

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt
new file mode 100644
index 000000000000..ccf0adddc820
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt
@@ -0,0 +1,12 @@ 
+NVIDIA Tegra Flow Controller
+
+Required properties:
+- compatible: Should be "nvidia,tegra<chip>-flowctrl"
+- reg: Should contain one register range (address and length)
+
+Example:
+
+	flow-controller@60007000 {
+		compatible = "nvidia,tegra20-flowctrl";
+		reg = <0x60007000 0x1000>;
+	};