From patchwork Sat Aug 30 20:03:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 4814261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 384A0C0338 for ; Sat, 30 Aug 2014 20:10:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6018820117 for ; Sat, 30 Aug 2014 20:10:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6E28B200E5 for ; Sat, 30 Aug 2014 20:10:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XNowW-0005uB-Lb; Sat, 30 Aug 2014 20:08:12 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XNouB-0004Fc-CO for linux-arm-kernel@lists.infradead.org; Sat, 30 Aug 2014 20:05:51 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id E73309A3; Sat, 30 Aug 2014 22:05:16 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (181.123.101.84.rev.sfr.net [84.101.123.181]) by mail.free-electrons.com (Postfix) with ESMTPSA id 451F4159; Sat, 30 Aug 2014 22:05:16 +0200 (CEST) From: Maxime Ripard To: Mike Turquette , Hans de Goede , Emilio Lopez , chris@printf.net, david.lanzendoerfer@o2s.ch, ulf.hansson@linaro.org Subject: [PATCH v2 08/12] clk: sunxi: Move mbus to mod0 file Date: Sat, 30 Aug 2014 22:03:07 +0200 Message-Id: <1409428991-2442-9-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.0.2 In-Reply-To: <1409428991-2442-1-git-send-email-maxime.ripard@free-electrons.com> References: <1409428991-2442-1-git-send-email-maxime.ripard@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140830_130548_287129_D8D6D898 X-CRM114-Status: GOOD ( 13.37 ) X-Spam-Score: 1.0 (+) Cc: devicetree@vger.kernel.org, Maxime Ripard , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Move the MBUS clock to the module clocks file. It's pretty trivial, but still requires to enable the clocks to make sure it won't get disabled. Signed-off-by: Maxime Ripard --- drivers/clk/sunxi/clk-mod0.c | 12 +++++++++ drivers/clk/sunxi/clk-sunxi.c | 57 ------------------------------------------- 2 files changed, 12 insertions(+), 57 deletions(-) diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c index bce09a84ab4f..8a7f7036aea3 100644 --- a/drivers/clk/sunxi/clk-mod0.c +++ b/drivers/clk/sunxi/clk-mod0.c @@ -80,3 +80,15 @@ static void __init sun4i_a10_mod0_setup(struct device_node *node) sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun4i_a10_mod0_lock); } CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk", sun4i_a10_mod0_setup); + +static DEFINE_SPINLOCK(sun5i_a13_mbus_lock); + +static void __init sun5i_a13_mbus_setup(struct device_node *node) +{ + struct clk *mbus = sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun5i_a13_mbus_lock); + + /* The MBUS clocks needs to be always enabled */ + __clk_get(mbus); + clk_prepare_enable(mbus); +} +CLK_OF_DECLARE(sun5i_a13_mbus, "allwinner,sun5i-a13-mbus-clk", sun5i_a13_mbus_setup); diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 6eec82b29bb4..4e189be3e23f 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -320,46 +320,6 @@ static void sun4i_get_apb1_factors(u32 *freq, u32 parent_rate, -/** - * sun4i_get_mod0_factors() - calculates m, n factors for MOD0-style clocks - * MOD0 rate is calculated as follows - * rate = (parent_rate >> p) / (m + 1); - */ - -static void sun4i_get_mod0_factors(u32 *freq, u32 parent_rate, - u8 *n, u8 *k, u8 *m, u8 *p) -{ - u8 div, calcm, calcp; - - /* These clocks can only divide, so we will never be able to achieve - * frequencies higher than the parent frequency */ - if (*freq > parent_rate) - *freq = parent_rate; - - div = DIV_ROUND_UP(parent_rate, *freq); - - if (div < 16) - calcp = 0; - else if (div / 2 < 16) - calcp = 1; - else if (div / 4 < 16) - calcp = 2; - else - calcp = 3; - - calcm = DIV_ROUND_UP(div, 1 << calcp); - - *freq = (parent_rate >> calcp) / calcm; - - /* we were called to round the frequency, we can now return */ - if (n == NULL) - return; - - *m = calcm - 1; - *p = calcp; -} - - /** * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B @@ -495,14 +455,6 @@ static struct clk_factors_config sun4i_apb1_config = { }; /* user manual says "n" but it's really "p" */ -static struct clk_factors_config sun4i_mod0_config = { - .mshift = 0, - .mwidth = 4, - .pshift = 16, - .pwidth = 2, -}; - -/* user manual says "n" but it's really "p" */ static struct clk_factors_config sun7i_a20_out_config = { .mshift = 8, .mwidth = 5, @@ -559,13 +511,6 @@ static const struct factors_data sun4i_apb1_data __initconst = { .getter = sun4i_get_apb1_factors, }; -static const struct factors_data sun4i_mod0_data __initconst = { - .enable = 31, - .mux = 24, - .table = &sun4i_mod0_config, - .getter = sun4i_get_mod0_factors, -}; - static const struct factors_data sun7i_a20_out_data __initconst = { .enable = 31, .mux = 24, @@ -1110,7 +1055,6 @@ static const struct of_device_id clk_factors_match[] __initconst = { {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,}, {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,}, {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,}, - {.compatible = "allwinner,sun5i-a13-mbus-clk", .data = &sun4i_mod0_data,}, {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,}, {} }; @@ -1222,7 +1166,6 @@ static void __init sun4i_a10_init_clocks(struct device_node *node) CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks); static const char *sun5i_critical_clocks[] __initdata = { - "mbus", "pll5_ddr", "ahb_sdram", };