From patchwork Wed Sep 3 16:50:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 4835901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 347B1C0338 for ; Wed, 3 Sep 2014 16:56:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 638F2200F0 for ; Wed, 3 Sep 2014 16:56:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86B1D200E0 for ; Wed, 3 Sep 2014 16:56:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XPDmM-00068F-O7; Wed, 03 Sep 2014 16:51:30 +0000 Received: from ns.mm-sol.com ([37.157.136.199] helo=extserv.mm-sol.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XPDm4-0005mN-Qu for linux-arm-kernel@lists.infradead.org; Wed, 03 Sep 2014 16:51:13 +0000 Received: from mms.wifi.mm-sol.com (unknown [37.157.136.206]) by extserv.mm-sol.com (Postfix) with ESMTPSA id 9F0FDC802; Wed, 3 Sep 2014 19:50:50 +0300 (EEST) From: Georgi Djakov To: galak@codeaurora.org Subject: [PATCH v3] ARM: dts: qcom: Add initial IFC6540 board device tree Date: Wed, 3 Sep 2014 19:50:31 +0300 Message-Id: <1409763031-16873-1-git-send-email-gdjakov@mm-sol.com> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140903_095113_074078_A04DD2AA X-CRM114-Status: GOOD ( 10.38 ) X-Spam-Score: -1.7 (-) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux@arm.linux.org.uk, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, Georgi Djakov , iivanov@mm-sol.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add basic support for the IFC6540 single-board computer boards, that are based on the APQ8084 SoC. This patch adds the initial device tree and the neccessary nodes required for enabling the serial port and eMMC. Signed-off-by: Georgi Djakov --- Changes since v2: - Squashed all patches into one. (suggested by Kumar Gala) Changes since v1: - This time add linux-arm-msm list to the CC. - Include a third patch for enabling the eMMC. arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8084-ifc6540.dts | 23 +++++++++++++++++++++++ arch/arm/boot/dts/qcom-apq8084.dtsi | 23 +++++++++++++++++++++++ 3 files changed, 47 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8084-ifc6540.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b022972..df8453a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -345,6 +345,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8064-ifc6410.dtb \ qcom-apq8074-dragonboard.dtb \ + qcom-apq8084-ifc6540.dtb \ qcom-apq8084-mtp.dtb \ qcom-msm8660-surf.dtb \ qcom-msm8960-cdp.dtb diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts new file mode 100644 index 0000000..c9ff108 --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts @@ -0,0 +1,23 @@ +#include "qcom-apq8084.dtsi" + +/ { + model = "Qualcomm APQ8084/IFC6540"; + compatible = "qcom,apq8084-ifc6540", "qcom,apq8084"; + + soc { + serial@f995e000 { + status = "okay"; + }; + + sdhci@f9824900 { + bus-width = <8>; + non-removable; + status = "okay"; + }; + + sdhci@f98a4900 { + cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>; + bus-width = <4>; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 21d01e5..1f130bc 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -3,6 +3,7 @@ #include "skeleton.dtsi" #include +#include / { model = "Qualcomm APQ 8084"; @@ -203,5 +204,27 @@ clock-names = "core", "iface"; status = "disabled"; }; + + sdhci@f9824900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; + reg-names = "hc_mem", "core_mem"; + interrupts = <0 123 0>, <0 138 0>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + sdhci@f98a4900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; + reg-names = "hc_mem", "core_mem"; + interrupts = <0 125 0>, <0 221 0>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; }; };