From patchwork Fri Sep 5 16:53:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 4853211 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 04748C0338 for ; Fri, 5 Sep 2014 16:56:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1A69120114 for ; Fri, 5 Sep 2014 16:56:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E322200D6 for ; Fri, 5 Sep 2014 16:56:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XPwlb-0008Hi-QZ; Fri, 05 Sep 2014 16:53:43 +0000 Received: from mail-pa0-x235.google.com ([2607:f8b0:400e:c03::235]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XPwlX-0008Al-0g for linux-arm-kernel@lists.infradead.org; Fri, 05 Sep 2014 16:53:41 +0000 Received: by mail-pa0-f53.google.com with SMTP id fa1so22606372pad.40 for ; Fri, 05 Sep 2014 09:53:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=ai4z0t7xeyzY6Owbxe/15EBB3MPeaa0RH8cFkd0p+/s=; b=SBskCSt2B2gn0MheWBWWhKYZW3EGPyhfhqyIIouvbOzq9fAFUAdZnjqGVUtVSclGtr fM7fTdMYwhJE8AbY55XlZP6iA4fHezEI4kow8ocp/RLSqySI1hLWYqFEJqUnyUVFe1ot mD8758uBH/V8yUlJ5tThnxjG3R3fjnwezPgVw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ai4z0t7xeyzY6Owbxe/15EBB3MPeaa0RH8cFkd0p+/s=; b=Vjysk2MWs97G+ukKe78HZnbwsXvBKo1wxXYBdcZSf+TXn+8aC5wY9BZgJrb9gTyEj+ u5El5mOYSnilylwyljffa6qOX0iGwJgvGQ35sa2P5fiTHyXR30zNdCoXkjVJAEmLFo4x cozo61Hwsg9ncEGpxo2rx280/vz0hAdRqN8tAFIfIUtUg5KvvGGEmloyTlf9thEuzaTV ffpc8OXl/+sRh1a1LV7784jskNZTldZh10PiChzGd9tgejqlFGeoPWtTXHCJmDcPhfaV Euf+9goepw3T6K0fEYHZOQQpsfTDLRm4KU6JtfZTBg9fRoU/NrGqD+LuPGPT2rfdeuJo hnzw== X-Gm-Message-State: ALoCoQk6lTpNBHFDoHkcnHmK1joLmKyBNYPanknDV3+rj2n7b6VmerzdrrXjdNTLIEf3Q7Z/rtjR X-Received: by 10.66.90.162 with SMTP id bx2mr23098595pab.39.1409935997725; Fri, 05 Sep 2014 09:53:17 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.162.15]) by mx.google.com with ESMTPSA id rf1sm2217432pdb.16.2014.09.05.09.53.16 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Sep 2014 09:53:16 -0700 (PDT) From: Doug Anderson To: Heiko Stuebner Subject: [PATCH] ARM: dts: Add SPI nodes to rk3288 Date: Fri, 5 Sep 2014 09:53:11 -0700 Message-Id: <1409935991-15067-1-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140905_095339_093369_94BCD6A9 X-CRM114-Status: GOOD ( 11.30 ) X-Spam-Score: 0.9 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Addy Ke , Russell King , hl@rock-chips.com, Pawel Moll , Ian Campbell , Doug Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Sonny Rao , linux-arm-kernel@lists.infradead.org, Alexandru Stan X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY, URIBL_BLACK autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: huang lin This adds basic SPI nodes to the base rk3288 device tree file. A few notes: * It's assumed that most users of the SPI ports are using chip select 0. Thus the default pinctrl for the ports enables chip select 0 (but not chip select 1 on ports that have it). If a board wants to use chip select 1 or wants a GPIO chip select the board should override the pinctrl (just like boards can override UART pinctrl if they have hardware flow control). * Since SPI DMA support appears broken and the SPI works fine without DMA we don't include the DMA references. That can come in a later change. Signed-off-by: huang lin Signed-off-by: Doug Anderson --- arch/arm/boot/dts/rk3288.dtsi | 92 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 5f866e0..75d1f4c 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -34,6 +34,9 @@ serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; }; cpus { @@ -128,6 +131,45 @@ status = "disabled"; }; + spi0: spi@ff110000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; + reg = <0xff110000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@ff120000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; + reg = <0xff120000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@ff130000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>; + reg = <0xff130000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c1: i2c@ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>; @@ -700,6 +742,56 @@ }; }; + spi0 { + spi0_clk: spi0-clk { + rockchip,pins = <5 12 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_cs0: spi0-cs0 { + rockchip,pins = <5 13 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_tx: spi0-tx { + rockchip,pins = <5 14 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_rx: spi0-rx { + rockchip,pins = <5 15 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_cs1: spi0-cs1 { + rockchip,pins = <5 16 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + spi1 { + spi1_clk: spi1-clk { + rockchip,pins = <7 12 RK_FUNC_2 &pcfg_pull_up>; + }; + spi1_cs0: spi1-cs0 { + rockchip,pins = <7 13 RK_FUNC_2 &pcfg_pull_up>; + }; + spi1_rx: spi1-rx { + rockchip,pins = <7 14 RK_FUNC_2 &pcfg_pull_up>; + }; + spi1_tx: spi1-tx { + rockchip,pins = <7 15 RK_FUNC_2 &pcfg_pull_up>; + }; + }; + + spi2 { + spi2_cs1: spi2-cs1 { + rockchip,pins = <8 3 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_clk: spi2-clk { + rockchip,pins = <8 6 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_cs0: spi2-cs0 { + rockchip,pins = <8 7 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_rx: spi2-rx { + rockchip,pins = <8 8 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_tx: spi2-tx { + rockchip,pins = <8 9 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>,