From patchwork Fri Sep 12 05:49:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 4891901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3B4839F537 for ; Fri, 12 Sep 2014 05:48:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DAC0C20260 for ; Fri, 12 Sep 2014 05:53:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CAD1F2024F for ; Fri, 12 Sep 2014 05:53:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XSJkh-0000J2-VJ; Fri, 12 Sep 2014 05:50:35 +0000 Received: from mail-bn1bon0147.outbound.protection.outlook.com ([157.56.111.147] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XSJke-0000H7-5T for linux-arm-kernel@lists.infradead.org; Fri, 12 Sep 2014 05:50:33 +0000 Received: from BY2PR03CA049.namprd03.prod.outlook.com (10.141.249.22) by BL2PR03MB369.namprd03.prod.outlook.com (10.141.89.12) with Microsoft SMTP Server (TLS) id 15.0.1019.16; Fri, 12 Sep 2014 05:50:08 +0000 Received: from BN1BFFO11FD014.protection.gbl (2a01:111:f400:7c10::1:198) by BY2PR03CA049.outlook.office365.com (2a01:111:e400:2c5d::22) with Microsoft SMTP Server (TLS) id 15.0.1029.13 via Frontend Transport; Fri, 12 Sep 2014 05:50:07 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1BFFO11FD014.mail.protection.outlook.com (10.58.144.77) with Microsoft SMTP Server (TLS) id 15.0.1019.14 via Frontend Transport; Fri, 12 Sep 2014 05:50:07 +0000 Received: from dragon.ap.freescale.net ([10.192.185.182]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s8C5o1wf031452; Thu, 11 Sep 2014 22:50:02 -0700 From: Shawn Guo To: Subject: [PATCH] ARM: imx: fix register offset of pll7_usb_host gate clock Date: Fri, 12 Sep 2014 13:49:58 +0800 Message-ID: <1410500998-6222-1-git-send-email-shawn.guo@freescale.com> X-Mailer: git-send-email 1.9.1 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(189002)(199003)(19580405001)(36756003)(229853001)(99396002)(20776003)(107046002)(83322001)(4396001)(80022001)(83072002)(85852003)(86362001)(6806004)(74502001)(87286001)(21056001)(26826002)(74662001)(104016003)(46102001)(84676001)(50986999)(106466001)(48376002)(85306004)(92726001)(19580395003)(31966008)(68736004)(89996001)(62966002)(97736003)(77982001)(81542001)(95666004)(105606002)(77156001)(575784001)(92566001)(76482001)(2351001)(50466002)(33646002)(93916002)(50226001)(44976005)(79102001)(87936001)(64706001)(90102001)(47776003)(102836001)(81342001)(110136001)(88136002)(104166001); DIR:OUT; SFP:1102; SCL:1; SRVR:BL2PR03MB369; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 0332AACBC3 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Shawn.Guo@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140911_225032_384290_7CF02C43 X-CRM114-Status: UNSURE ( 8.81 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.8 (-) Cc: Fugang Duan , Shawn Guo , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is a copy&paste error on register offset of pll7_usb_host gate clock introduced by i.MX6 PLL bypass support patches. The error breaks the ENET function, because it overwrites the pll6_enet gate bit. Correct the offset for all i.MX6 clock drivers. Thanks to Fugang Duan for spotting the error. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 2 +- arch/arm/mach-imx/clk-imx6sl.c | 2 +- arch/arm/mach-imx/clk-imx6sx.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 4ee6e77a0fdf..4f8ce60a2e90 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -187,7 +187,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", base + 0x70, 13); clk[IMX6QDL_CLK_PLL5_VIDEO] = imx_clk_gate("pll5_video", "pll5_bypass", base + 0xa0, 13); clk[IMX6QDL_CLK_PLL6_ENET] = imx_clk_gate("pll6_enet", "pll6_bypass", base + 0xe0, 13); - clk[IMX6QDL_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0xe0, 13); + clk[IMX6QDL_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0x20, 13); /* * Bit 20 is the reserved and read-only bit, we do this only for: diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c index c8de87bc617f..e982ebe10814 100644 --- a/arch/arm/mach-imx/clk-imx6sl.c +++ b/arch/arm/mach-imx/clk-imx6sl.c @@ -243,7 +243,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) clks[IMX6SL_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", base + 0x70, 13); clks[IMX6SL_CLK_PLL5_VIDEO] = imx_clk_gate("pll5_video", "pll5_bypass", base + 0xa0, 13); clks[IMX6SL_CLK_PLL6_ENET] = imx_clk_gate("pll6_enet", "pll6_bypass", base + 0xe0, 13); - clks[IMX6SL_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0xe0, 13); + clks[IMX6SL_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0x20, 13); clks[IMX6SL_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); clks[IMX6SL_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12)); diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index 27070a716935..17354a11356f 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -198,7 +198,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) clks[IMX6SX_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", base + 0x70, 13); clks[IMX6SX_CLK_PLL5_VIDEO] = imx_clk_gate("pll5_video", "pll5_bypass", base + 0xa0, 13); clks[IMX6SX_CLK_PLL6_ENET] = imx_clk_gate("pll6_enet", "pll6_bypass", base + 0xe0, 13); - clks[IMX6SX_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0xe0, 13); + clks[IMX6SX_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0x20, 13); /* * Bit 20 is the reserved and read-only bit, we do this only for: