| Message ID | 1410926353-15674-3-git-send-email-caesar.wang@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Caesar, On Tue, Sep 16, 2014 at 8:59 PM, Caesar Wang <caesar.wang@rock-chips.com> wrote: > This add the necessary binding documentation for the thermal > found on Rockchip SoCs > > Signed-off-by: zhaoyifeng <zyf@rock-chips.com> > Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> > --- > .../bindings/thermal/rockchip-thermal.txt | 41 ++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > > diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > new file mode 100644 > index 0000000..6fc8bc3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > @@ -0,0 +1,41 @@ > +* Temperature Sensor ADC (TSADC) on rockchip SoCs > + > +Required properties: > +- compatible: "rockchip,rk3288-tsadc" > +- reg: physical base address of the controller and length of memory mapped > + region. > +- interrupts: The interrupt number to the cpu. The interrupt specifier format > + depends on the interrupt controller. > +- clocks: Must contain an entry for each entry in clock-names. > +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" for > + the peripheral clock. > +- num-trips: number of total trip points, this is required, set it 0 if none, > + if greater than 0, the following properties must be defined; nit: there is whitespace damage (space before tab) on the line before this one. It's more obvious in the patch you uploaded to gerrit which highlights this in red: https://chromium-review.googlesource.com/#/c/213967/5/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt Did you run your patches through checkpatch before submitting? -Doug
On Wed, Sep 17, 2014 at 12:48:16PM -0700, Doug Anderson wrote: > Caesar, > > On Tue, Sep 16, 2014 at 8:59 PM, Caesar Wang <caesar.wang@rock-chips.com> wrote: > > This add the necessary binding documentation for the thermal > > found on Rockchip SoCs > > > > Signed-off-by: zhaoyifeng <zyf@rock-chips.com> > > Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> > > --- > > .../bindings/thermal/rockchip-thermal.txt | 41 ++++++++++++++++++++++ > > 1 file changed, 41 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > > > > diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > > new file mode 100644 > > index 0000000..6fc8bc3 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > > @@ -0,0 +1,41 @@ > > +* Temperature Sensor ADC (TSADC) on rockchip SoCs > > + > > +Required properties: > > +- compatible: "rockchip,rk3288-tsadc" > > +- reg: physical base address of the controller and length of memory mapped > > + region. > > +- interrupts: The interrupt number to the cpu. The interrupt specifier format > > + depends on the interrupt controller. > > +- clocks: Must contain an entry for each entry in clock-names. > > +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" for > > + the peripheral clock. > > +- num-trips: number of total trip points, this is required, set it 0 if none, > > + if greater than 0, the following properties must be defined; > > nit: there is whitespace damage (space before tab) on the line before > this one. It's more obvious in the patch you uploaded to gerrit which > highlights this in red: > > https://chromium-review.googlesource.com/#/c/213967/5/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > > Did you run your patches through checkpatch before submitting? FWIW vim users like me can put the following in their .vimrc file to have whitespace damage visible right away: :highlight RedundantSpaces ctermbg=red guibg=red :match RedundantSpaces /\s\+$\| \+\ze\t/ Thanks.
? 2014?09?18? 04:13, Dmitry Torokhov ??: > On Wed, Sep 17, 2014 at 12:48:16PM -0700, Doug Anderson wrote: >> Caesar, >> >> On Tue, Sep 16, 2014 at 8:59 PM, Caesar Wang <caesar.wang@rock-chips.com> wrote: >>> This add the necessary binding documentation for the thermal >>> found on Rockchip SoCs >>> >>> Signed-off-by: zhaoyifeng <zyf@rock-chips.com> >>> Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> >>> --- >>> .../bindings/thermal/rockchip-thermal.txt | 41 ++++++++++++++++++++++ >>> 1 file changed, 41 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> >>> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> new file mode 100644 >>> index 0000000..6fc8bc3 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> @@ -0,0 +1,41 @@ >>> +* Temperature Sensor ADC (TSADC) on rockchip SoCs >>> + >>> +Required properties: >>> +- compatible: "rockchip,rk3288-tsadc" >>> +- reg: physical base address of the controller and length of memory mapped >>> + region. >>> +- interrupts: The interrupt number to the cpu. The interrupt specifier format >>> + depends on the interrupt controller. >>> +- clocks: Must contain an entry for each entry in clock-names. >>> +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" for >>> + the peripheral clock. >>> +- num-trips: number of total trip points, this is required, set it 0 if none, >>> + if greater than 0, the following properties must be defined; >> nit: there is whitespace damage (space before tab) on the line before >> this one. It's more obvious in the patch you uploaded to gerrit which >> highlights this in red: >> >> https://chromium-review.googlesource.com/#/c/213967/5/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >> >> Did you run your patches through checkpatch before submitting? > FWIW vim users like me can put the following in their .vimrc file to > have whitespace damage visible right away: > > :highlight RedundantSpaces ctermbg=red guibg=red > :match RedundantSpaces /\s\+$\| \+\ze\t/ > > Thanks. It's a very useful, Thank you for sharing.
On 17 September 2014 05:59, Caesar Wang <caesar.wang@rock-chips.com> wrote: > This add the necessary binding documentation for the thermal > found on Rockchip SoCs Hi Caesar, is there any reason to not use the existing thermal bindings? You can find a description in Documentation/devicetree/bindings/thermal/thermal.txt and example code in omap, or in the patches for Tegra recently posted by Mikko Perttunen. Regards, Tomeu > Signed-off-by: zhaoyifeng <zyf@rock-chips.com> > Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> > --- > .../bindings/thermal/rockchip-thermal.txt | 41 ++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > > diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > new file mode 100644 > index 0000000..6fc8bc3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > @@ -0,0 +1,41 @@ > +* Temperature Sensor ADC (TSADC) on rockchip SoCs > + > +Required properties: > +- compatible: "rockchip,rk3288-tsadc" > +- reg: physical base address of the controller and length of memory mapped > + region. > +- interrupts: The interrupt number to the cpu. The interrupt specifier format > + depends on the interrupt controller. > +- clocks: Must contain an entry for each entry in clock-names. > +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" for > + the peripheral clock. > +- num-trips: number of total trip points, this is required, set it 0 if none, > + if greater than 0, the following properties must be defined; > +- tripN-temp: temperature of trip point N, should be in ascending order; > +- tripN-type: type of trip point N, should be one of "active" "passive" "hot" > + "critical"; > +- tripN-cdev-num: number of the cooling devices which can be bound to trip > + point N, this is required if trip point N is defined, set it 0 if none, > + otherwise the following cooling device names must be defined; > +- tripN-cdev-nameM: name of the No. M cooling device of trip point N; > + > +Example: > +tsadc: tsadc@ff280000 { > + compatible = "rockchip,rk3288-tsadc"; > + reg = <0xff280000 0x100>; > + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; > + clock-names = "tsadc", "apb_pclk"; > + > + num-trips = <2>; > + > + trip0-temp = <80>; > + trip0-type = "passive"; > + trip0-cdev-num = <1>; > + trip0-cdev-name0 = "thermal-cpufreq-0"; > + > + trip1-temp = <100>; > + trip1-type = "critical"; > + trip1-cdev-num = <1>; > + trip1-cdev-name0 = "thermal-cpufreq-0"; > +}; > -- > 1.9.1 > > > -- > To unsubscribe from this list: send the line "unsubscribe linux-pm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
Tomeu, ? 2014?09?18? 17:27, Tomeu Vizoso ??: > On 17 September 2014 05:59, Caesar Wang <caesar.wang@rock-chips.com> wrote: >> This add the necessary binding documentation for the thermal >> found on Rockchip SoCs > Hi Caesar, > > is there any reason to not use the existing thermal bindings? You can > find a description in > Documentation/devicetree/bindings/thermal/thermal.txt and example code > in omap, or in the patches for Tegra recently posted by Mikko > Perttunen. > > Regards, > > Tomeu Why should I use the existing thermal bindings? I believe omap,tegar and rockchip are the three seperate thermals driver. So far, I submitted the series Patchs for rockchip thermal. > >> Signed-off-by: zhaoyifeng <zyf@rock-chips.com> >> Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> >> --- >> .../bindings/thermal/rockchip-thermal.txt | 41 ++++++++++++++++++++++ >> 1 file changed, 41 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >> >> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >> new file mode 100644 >> index 0000000..6fc8bc3 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >> @@ -0,0 +1,41 @@ >> +* Temperature Sensor ADC (TSADC) on rockchip SoCs >> + >> +Required properties: >> +- compatible: "rockchip,rk3288-tsadc" >> +- reg: physical base address of the controller and length of memory mapped >> + region. >> +- interrupts: The interrupt number to the cpu. The interrupt specifier format >> + depends on the interrupt controller. >> +- clocks: Must contain an entry for each entry in clock-names. >> +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" for >> + the peripheral clock. >> +- num-trips: number of total trip points, this is required, set it 0 if none, >> + if greater than 0, the following properties must be defined; >> +- tripN-temp: temperature of trip point N, should be in ascending order; >> +- tripN-type: type of trip point N, should be one of "active" "passive" "hot" >> + "critical"; >> +- tripN-cdev-num: number of the cooling devices which can be bound to trip >> + point N, this is required if trip point N is defined, set it 0 if none, >> + otherwise the following cooling device names must be defined; >> +- tripN-cdev-nameM: name of the No. M cooling device of trip point N; >> + >> +Example: >> +tsadc: tsadc@ff280000 { >> + compatible = "rockchip,rk3288-tsadc"; >> + reg = <0xff280000 0x100>; >> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; >> + clock-names = "tsadc", "apb_pclk"; >> + >> + num-trips = <2>; >> + >> + trip0-temp = <80>; >> + trip0-type = "passive"; >> + trip0-cdev-num = <1>; >> + trip0-cdev-name0 = "thermal-cpufreq-0"; >> + >> + trip1-temp = <100>; >> + trip1-type = "critical"; >> + trip1-cdev-num = <1>; >> + trip1-cdev-name0 = "thermal-cpufreq-0"; >> +}; >> -- >> 1.9.1 >> >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-pm" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > >
On 18 September 2014 15:25, Caesar Wang <caesar.wang@rock-chips.com> wrote: > Tomeu, > > ? 2014?09?18? 17:27, Tomeu Vizoso ??: >> >> On 17 September 2014 05:59, Caesar Wang <caesar.wang@rock-chips.com> >> wrote: >>> >>> This add the necessary binding documentation for the thermal >>> found on Rockchip SoCs >> >> Hi Caesar, >> >> is there any reason to not use the existing thermal bindings? You can >> find a description in >> Documentation/devicetree/bindings/thermal/thermal.txt and example code >> in omap, or in the patches for Tegra recently posted by Mikko >> Perttunen. >> >> Regards, >> >> Tomeu > > > Why should I use the existing thermal bindings? Because otherwise, you are asking to merge duplicated code. There's a generic way to define thermal zones, trip points, cooling devices, etc. And also code to parse and plug them together. Why add soc-specific code to do the same? > I believe omap,tegar and rockchip are the three seperate thermals driver. Yes, and OMAP is already using the generic bindings, and the proposed patches for Tegra as well, and I think it would make sense for Rockchip to also use them (unless I'm missing something). Regards, Tomeu > So far, I submitted the series Patchs for rockchip thermal. > >> >>> Signed-off-by: zhaoyifeng <zyf@rock-chips.com> >>> Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> >>> --- >>> .../bindings/thermal/rockchip-thermal.txt | 41 >>> ++++++++++++++++++++++ >>> 1 file changed, 41 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> >>> diff --git >>> a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> new file mode 100644 >>> index 0000000..6fc8bc3 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt >>> @@ -0,0 +1,41 @@ >>> +* Temperature Sensor ADC (TSADC) on rockchip SoCs >>> + >>> +Required properties: >>> +- compatible: "rockchip,rk3288-tsadc" >>> +- reg: physical base address of the controller and length of memory >>> mapped >>> + region. >>> +- interrupts: The interrupt number to the cpu. The interrupt specifier >>> format >>> + depends on the interrupt controller. >>> +- clocks: Must contain an entry for each entry in clock-names. >>> +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" >>> for >>> + the peripheral clock. >>> +- num-trips: number of total trip points, this is required, set it 0 if >>> none, >>> + if greater than 0, the following properties must be >>> defined; >>> +- tripN-temp: temperature of trip point N, should be in ascending order; >>> +- tripN-type: type of trip point N, should be one of "active" "passive" >>> "hot" >>> + "critical"; >>> +- tripN-cdev-num: number of the cooling devices which can be bound to >>> trip >>> + point N, this is required if trip point N is defined, >>> set it 0 if none, >>> + otherwise the following cooling device names must be >>> defined; >>> +- tripN-cdev-nameM: name of the No. M cooling device of trip point N; >>> + >>> +Example: >>> +tsadc: tsadc@ff280000 { >>> + compatible = "rockchip,rk3288-tsadc"; >>> + reg = <0xff280000 0x100>; >>> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; >>> + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; >>> + clock-names = "tsadc", "apb_pclk"; >>> + >>> + num-trips = <2>; >>> + >>> + trip0-temp = <80>; >>> + trip0-type = "passive"; >>> + trip0-cdev-num = <1>; >>> + trip0-cdev-name0 = "thermal-cpufreq-0"; >>> + >>> + trip1-temp = <100>; >>> + trip1-type = "critical"; >>> + trip1-cdev-num = <1>; >>> + trip1-cdev-name0 = "thermal-cpufreq-0"; >>> +}; >>> -- >>> 1.9.1 >>> >>> >>> -- >>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in >>> the body of a message to majordomo@vger.kernel.org >>> More majordomo info at http://vger.kernel.org/majordomo-info.html >> >> >> > > -- > Best regards, > Caesar > >
On Thu, Sep 18, 2014 at 04:19:26PM +0200, Tomeu Vizoso wrote: > On 18 September 2014 15:25, Caesar Wang <caesar.wang@rock-chips.com> wrote: > > Tomeu, > > > > ? 2014?09?18? 17:27, Tomeu Vizoso ??: > >> > >> On 17 September 2014 05:59, Caesar Wang <caesar.wang@rock-chips.com> > >> wrote: > >>> > >>> This add the necessary binding documentation for the thermal > >>> found on Rockchip SoCs > >> > >> Hi Caesar, > >> > >> is there any reason to not use the existing thermal bindings? You can > >> find a description in > >> Documentation/devicetree/bindings/thermal/thermal.txt and example code > >> in omap, or in the patches for Tegra recently posted by Mikko > >> Perttunen. > >> > >> Regards, > >> > >> Tomeu > > > > > > Why should I use the existing thermal bindings? > > Because otherwise, you are asking to merge duplicated code. There's a > generic way to define thermal zones, trip points, cooling devices, > etc. And also code to parse and plug them together. Why add > soc-specific code to do the same? > > > I believe omap,tegar and rockchip are the three seperate thermals driver. > > Yes, and OMAP is already using the generic bindings, and the proposed > patches for Tegra as well, and I think it would make sense for > Rockchip to also use them (unless I'm missing something). You are talking about drivers/thermal/of-thermal.c, right? Yes, I think Rockchip should be using the same generic framework if possible. Thanks.
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt new file mode 100644 index 0000000..6fc8bc3 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt @@ -0,0 +1,41 @@ +* Temperature Sensor ADC (TSADC) on rockchip SoCs + +Required properties: +- compatible: "rockchip,rk3288-tsadc" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: The interrupt number to the cpu. The interrupt specifier format + depends on the interrupt controller. +- clocks: Must contain an entry for each entry in clock-names. +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk" for + the peripheral clock. +- num-trips: number of total trip points, this is required, set it 0 if none, + if greater than 0, the following properties must be defined; +- tripN-temp: temperature of trip point N, should be in ascending order; +- tripN-type: type of trip point N, should be one of "active" "passive" "hot" + "critical"; +- tripN-cdev-num: number of the cooling devices which can be bound to trip + point N, this is required if trip point N is defined, set it 0 if none, + otherwise the following cooling device names must be defined; +- tripN-cdev-nameM: name of the No. M cooling device of trip point N; + +Example: +tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + + num-trips = <2>; + + trip0-temp = <80>; + trip0-type = "passive"; + trip0-cdev-num = <1>; + trip0-cdev-name0 = "thermal-cpufreq-0"; + + trip1-temp = <100>; + trip1-type = "critical"; + trip1-cdev-num = <1>; + trip1-cdev-name0 = "thermal-cpufreq-0"; +};