From patchwork Fri Sep 26 05:59:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 4978691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 67FC29F3DF for ; Fri, 26 Sep 2014 06:02:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 28A0A202AE for ; Fri, 26 Sep 2014 06:02:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC82920274 for ; Fri, 26 Sep 2014 06:02:30 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XXOZt-0004Js-L4; Fri, 26 Sep 2014 06:00:25 +0000 Received: from mail-pd0-f176.google.com ([209.85.192.176]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XXOZi-00032i-1K for linux-arm-kernel@lists.infradead.org; Fri, 26 Sep 2014 06:00:14 +0000 Received: by mail-pd0-f176.google.com with SMTP id z10so10772992pdj.35 for ; Thu, 25 Sep 2014 22:59:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g6UuuL5Hw0rDOk4osGtahfKsrRd4LfDlagZmVCsIQfA=; b=TRMD22gHg22ftvuNcvJv+UXpNSsZgyqwOchGv5wuKigdD8nxZ4lkph81xXmfkqn3Y6 Yj0HUeHHvB52MHDuYwZFM/VwkN7D5kn4wy30WusFTs5dhZ0zYjhZ+OYvvTfJcKgECzWb hV+qj53+e6cyuLod4i27iN7BC8jCuNtHQgFbNlGg9XVLI5o58vSJZGGvKyy9brb6Fdmp VOnMsCtZ7EmNsjlO1laQk570QriR46cXcrRC4UJFYdapy4BpRwPPc90R3uCAVqnFjRyV 2l43rDmwGWaag9Aep+DmlS6fYIFuH9TYc4JgrNQlvO0mQoUHtbzjMwxIhwyoppe05hoP vb/Q== X-Gm-Message-State: ALoCoQkbXYy4lchcfYDgvOm5eI0zX7ksNrvUL/slzud5l8Bq3cioImUawfbIs1aLQPufTxkGUhI0 X-Received: by 10.70.140.193 with SMTP id ri1mr36835899pdb.18.1411711192830; Thu, 25 Sep 2014 22:59:52 -0700 (PDT) Received: from tharvey-gw.gw (68-189-91-139.static.snlo.ca.charter.com. [68.189.91.139]) by mx.google.com with ESMTPSA id ty8sm3855735pab.26.2014.09.25.22.59.51 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 25 Sep 2014 22:59:52 -0700 (PDT) From: Tim Harvey To: Shawn Guo Subject: [PATCH 2/2] ARM: imx: ventana: enable LDO bypass mode for GW54xx Date: Thu, 25 Sep 2014 22:59:32 -0700 Message-Id: <1411711172-16498-3-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1411711172-16498-1-git-send-email-tharvey@gateworks.com> References: <1411711172-16498-1-git-send-email-tharvey@gateworks.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140925_230014_098741_625E19AA X-CRM114-Status: GOOD ( 11.03 ) X-Spam-Score: -1.0 (-) Cc: Silvio F , Philipp Zabel , Christian Hemp , Russell King , Iain Paton , linux-arm-kernel@lists.infradead.org, Lucas Stach X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The GW54xx baseboard has a PFUZE100 PMIC capable of regulating the core voltages (VDD_ARM, VDD_SOC) externally such that the internal IMX6 anatop LDO regulators are not needed. This provides a power reduction (as the PMIC is more efficient than the LDO's) as well as moves some of the power/thermal burden from the IMX to the PMIC. Signed-off-by: Tim Harvey --- arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 63 ++++++++++++++++++++++++++--------- 1 file changed, 47 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi index 7b8bd61..e31356d 100644 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi @@ -142,6 +142,11 @@ status = "okay"; }; +&cpu0 { + arm-supply = <®_sw1a>; + soc-supply = <®_sw1c>; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; @@ -215,7 +220,8 @@ reg = <0x08>; regulators { - sw1a_reg: sw1ab { + /* VDD_ARM */ + reg_sw1a: sw1ab { regulator-min-microvolt = <300000>; regulator-max-microvolt = <1875000>; regulator-boot-on; @@ -223,7 +229,8 @@ regulator-ramp-delay = <6250>; }; - sw1c_reg: sw1c { + /* VDD_SOC */ + reg_sw1c: sw1c { regulator-min-microvolt = <300000>; regulator-max-microvolt = <1875000>; regulator-boot-on; @@ -231,77 +238,89 @@ regulator-ramp-delay = <6250>; }; - sw2_reg: sw2 { + /* VDD_HIGH */ + reg_sw2: sw2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <3950000>; regulator-boot-on; regulator-always-on; }; - sw3a_reg: sw3a { + /* VDD_DDR */ + reg_sw3a: sw3a { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-boot-on; regulator-always-on; }; - sw3b_reg: sw3b { + /* VDD_DDR */ + reg_sw3b: sw3b { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-boot-on; regulator-always-on; }; - sw4_reg: sw4 { + /* VDD_1P8 */ + reg_sw4: sw4 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; }; - swbst_reg: swbst { + /* VDD_5P0 */ + reg_swbst: swbst { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5150000>; }; - snvs_reg: vsnvs { + reg_snvs: vsnvs { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3000000>; regulator-boot-on; regulator-always-on; }; - vref_reg: vrefddr { + /* VDD_VREF */ + reg_vref: vrefddr { regulator-boot-on; regulator-always-on; }; - vgen1_reg: vgen1 { + /* VDD_PCIE-A_1P5 */ + reg_vgen1: vgen1 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; }; - vgen2_reg: vgen2 { + /* VDD_PCIE-B_1P5 */ + reg_vgen2: vgen2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; }; - vgen3_reg: vgen3 { + /* unused */ + reg_vgen3: vgen3 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; - vgen4_reg: vgen4 { + /* VDD_AUD_1P8 */ + reg_vgen4: vgen4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - vgen5_reg: vgen5 { + /* VDD_2P5 */ + reg_vgen5: vgen5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - vgen6_reg: vgen6 { + /* unused */ + reg_vgen6: vgen6 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; @@ -325,7 +344,7 @@ compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks 201>; - VDDA-supply = <&sw4_reg>; + VDDA-supply = <®_sw4>; VDDIO-supply = <®_3p3v>; }; @@ -380,6 +399,18 @@ status = "okay"; }; +®_arm { + anatop-ldo-bypass; +}; + +®_soc { + anatop-ldo-bypass; +}; + +®_pu { + anatop-ldo-bypass; +}; + &ssi1 { fsl,mode = "i2s-slave"; status = "okay";