From patchwork Tue Sep 30 14:30:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 5003641 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 82490BEEA6 for ; Tue, 30 Sep 2014 14:34:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C1006201BC for ; Tue, 30 Sep 2014 14:34:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CFA502018E for ; Tue, 30 Sep 2014 14:34:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XYyTk-0004Yq-SP; Tue, 30 Sep 2014 14:32:36 +0000 Received: from mail-pa0-x22a.google.com ([2607:f8b0:400e:c03::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XYySp-0002bx-Bj for linux-arm-kernel@lists.infradead.org; Tue, 30 Sep 2014 14:31:40 +0000 Received: by mail-pa0-f42.google.com with SMTP id et14so1910012pad.1 for ; Tue, 30 Sep 2014 07:31:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=xCoatKcMsNvw5jKMDU1AxQK1SEs70pMmoj3cfcAiNUY=; b=mKk9/3rlRIV+j/7YC5vWzxhZ7SdOT5Waw1RyD3NYWW8sV4XaG8B1ACM0cB/w2M5nYa vjl20BTmJzKRjDPgOTfPhoSeihwRVM/cWHqiykiuRI9+seAhBwC77H0cNrDrA74Dmsd0 P1N1b9IXP+Ph4DRhDntcRLnILsRMyEzM7DOOlWhmQSCDkkHjghIGJbNt4L8ZUHajpQ4B eHx3JcB6OZ0AKzrKk9AUqd99wirB6ViaYOaLwwHvaRL+uPeKIzQUw+cTM5Fq80rn6EFl TdOsPnSKNH+2qow7CHPe+Ujw8OWRYRU0w5gwIV//VBwp5uQre5jJmWBzchGlaLBuKrB3 P/lA== X-Received: by 10.66.141.77 with SMTP id rm13mr58338449pab.91.1412087477776; Tue, 30 Sep 2014 07:31:17 -0700 (PDT) Received: from localhost.localdomain ([122.167.172.42]) by mx.google.com with ESMTPSA id ic5sm15366345pbb.3.2014.09.30.07.31.14 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 30 Sep 2014 07:31:16 -0700 (PDT) From: Abhilash Kesavan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/6] pinctrl: exynos: Generalize the eint16_31 demux code Date: Tue, 30 Sep 2014 20:00:45 +0530 Message-Id: <1412087450-10495-2-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1412087450-10495-1-git-send-email-a.kesavan@samsung.com> References: <1412087450-10495-1-git-send-email-a.kesavan@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140930_073139_436931_E4071498 X-CRM114-Status: GOOD ( 17.00 ) X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, robh@kernel.org, catalin.marinas@arm.com, linus.walleij@linaro.org, tomasz.figa@gmail.com, naveenkrishna.ch@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external interrupt pending status and mask registers. So this function is not extensible for Exynos7 SoC which has these registers at different offsets. Generalize the exynos_irq_demux_eint16_31 function by using the pending/mask register offset values from the exynos_irq_chip structure. This is done by adding a irq_chip field to the samsung_pin_bank struct. Signed-off-by: Abhilash Kesavan Reviewed-by: Thomas Abraham Tested-by: Thomas Abraham Acked-by: Tomasz Figa Cc: Linus Walleij --- drivers/pinctrl/samsung/pinctrl-exynos.c | 14 ++++++++++---- drivers/pinctrl/samsung/pinctrl-samsung.h | 2 ++ 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index d7154ed..14b9b44 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -260,7 +260,7 @@ static int exynos_gpio_irq_map(struct irq_domain *h, unsigned int virq, struct samsung_pin_bank *b = h->host_data; irq_set_chip_data(virq, b); - irq_set_chip_and_handler(virq, &exynos_gpio_irq_chip.chip, + irq_set_chip_and_handler(virq, &b->irq_chip->chip, handle_level_irq); set_irq_flags(virq, IRQF_VALID); return 0; @@ -344,6 +344,8 @@ static int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d) ret = -ENOMEM; goto err_domains; } + + bank->irq_chip = &exynos_gpio_irq_chip; } return 0; @@ -445,9 +447,9 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) for (i = 0; i < eintd->nr_banks; ++i) { struct samsung_pin_bank *b = eintd->banks[i]; - pend = readl(d->virt_base + EXYNOS_WKUP_EPEND_OFFSET + pend = readl(d->virt_base + b->irq_chip->eint_pend + b->eint_offset); - mask = readl(d->virt_base + EXYNOS_WKUP_EMASK_OFFSET + mask = readl(d->virt_base + b->irq_chip->eint_mask + b->eint_offset); exynos_irq_demux_eint(pend & ~mask, b->irq_domain); } @@ -458,7 +460,9 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) static int exynos_wkup_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { - irq_set_chip_and_handler(virq, &exynos_wkup_irq_chip.chip, + struct samsung_pin_bank *b = h->host_data; + + irq_set_chip_and_handler(virq, &b->irq_chip->chip, handle_level_irq); irq_set_chip_data(virq, h->host_data); set_irq_flags(virq, IRQF_VALID); @@ -510,6 +514,8 @@ static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d) return -ENXIO; } + bank->irq_chip = &exynos_wkup_irq_chip; + if (!of_find_property(bank->of_node, "interrupts", NULL)) { bank->eint_type = EINT_TYPE_WKUP_MUX; ++muxed_banks; diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 5cedc9d..d2c38c8 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -127,6 +127,7 @@ struct samsung_pin_bank_type { * @irq_domain: IRQ domain of the bank. * @gpio_chip: GPIO chip of the bank. * @grange: linux gpio pin range supported by this bank. + * @irq_chip: link to irq chip for external gpio and wakeup interrupts. * @slock: spinlock protecting bank registers * @pm_save: saved register values during suspend */ @@ -146,6 +147,7 @@ struct samsung_pin_bank { struct irq_domain *irq_domain; struct gpio_chip gpio_chip; struct pinctrl_gpio_range grange; + struct exynos_irq_chip *irq_chip; spinlock_t slock; u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/