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Fri, 03 Oct 2014 08:40:56 -0700 (PDT) Received: from localhost.localdomain ([60.168.125.194]) by mx.google.com with ESMTPSA id qc3sm6757422pab.48.2014.10.03.08.38.20 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 03 Oct 2014 08:40:55 -0700 (PDT) From: Zhangfei Gao To: Wolfram Sang , Arnd Bergmann , haifeng.yan@linaro.org, jchxue@gmail.com, xuwei5@hisilicon.com Subject: [PATCH v4 1/3] i2c: hix5hd2: add devicetree documentation Date: Fri, 3 Oct 2014 23:35:47 +0800 Message-Id: <1412350549-2607-2-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1412350549-2607-1-git-send-email-zhangfei.gao@linaro.org> References: <1412350549-2607-1-git-send-email-zhangfei.gao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141003_084117_862468_05143E9A X-CRM114-Status: GOOD ( 10.65 ) X-Spam-Score: -0.9 (/) Cc: devicetree@vger.kernel.org, Zhangfei Gao , linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Wei Yan X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Wei Yan Signed-off-by: Wei Yan Signed-off-by: Zhangfei Gao --- .../devicetree/bindings/i2c/i2c-hix5hd2.txt | 25 ++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt diff --git a/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt b/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt new file mode 100644 index 0000000..660b7ba --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt @@ -0,0 +1,25 @@ +I2C for Hisilicon hix5hd2 chipset platform + +Required properties: +- compatible: Must be "hisilicon,hix5hd2-i2c" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: interrupt number to the cpu. +- #address-cells = <1>; +- #size-cells = <0>; +- clocks: phandles to input clocks. + +Optional properties: +- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000 +- Child nodes conforming to i2c bus binding + +Examples: +I2C0@f8b10000 { + compatible = "hisilicon,hix5hd2-i2c"; + reg = <0xf8b10000 0x1000>; + interrupts = <0 38 4>; + clocks = <&clock HIX5HD2_I2C0_RST>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +}