diff mbox

[v6,2/2] mtd: nand: add sunxi NFC dt bindings doc

Message ID 1413805520-14947-3-git-send-email-boris.brezillon@free-electrons.com (mailing list archive)
State New, archived
Headers show

Commit Message

Boris BREZILLON Oct. 20, 2014, 11:45 a.m. UTC
Add the sunxi NAND Flash Controller dt bindings documentation.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 .../devicetree/bindings/mtd/sunxi-nand.txt         | 45 ++++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt

Comments

Brian Norris Oct. 21, 2014, 2:41 a.m. UTC | #1
Hi Boris,

On Mon, Oct 20, 2014 at 01:45:20PM +0200, Boris Brezillon wrote:
> Add the sunxi NAND Flash Controller dt bindings documentation.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  .../devicetree/bindings/mtd/sunxi-nand.txt         | 45 ++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> 
> diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> new file mode 100644
> index 0000000..0273adb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> @@ -0,0 +1,45 @@
> +Allwinner NAND Flash Controller (NFC)
> +
> +Required properties:
> +- compatible : "allwinner,sun4i-a10-nand".
> +- reg : shall contain registers location and length for data and reg.
> +- interrupts : shall define the nand controller interrupt.
> +- #address-cells: shall be set to 1. Encode the nand CS.
> +- #size-cells : shall be set to 0.
> +- clocks : shall reference nand controller clocks.
> +- clock-names : nand controller internal clock names. Shall contain :
> +    * "ahb" : AHB gating clock
> +    * "mod" : nand controller clock
> +
> +Optional children nodes:
> +Children nodes represent the available nand chips.
> +
> +Optional properties:
> +- allwinner,rb : shall contain the native Ready/Busy ids.
> + or
> +- rb-gpios : shall contain the gpios used as R/B pins.

I think you're relying on a named GPIO in your driver ("nand-rb"). That
should be documented here.

> +- nand-ecc-mode : one of the supported ECC modes ("hw", "hw_syndrome", "soft",
> +  "soft_bch" or "none")

I think you're utilizing an undocumented 'nand-name' property for this
node in your driver too. Please document it. (That also goes for any
other undocumented properties I may have missed.)

> +
> +see Documentation/devicetree/mtd/nand.txt for generic bindings.
> +
> +
> +Examples:
> +nfc: nand@01c03000 {
> +	compatible = "allwinner,sun4i-a10-nand";
> +	reg = <0x01c03000 0x1000>;
> +	interrupts = <0 37 1>;
> +	clocks = <&ahb_gates 13>, <&nand_clk>;
> +	clock-names = "ahb", "mod";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
> +	status = "okay";
> +
> +	nand@0 {
> +		reg = <0>;
> +		allwinner,rb = <0>;
> +		nand-ecc-mode = "soft_bch";
> +	};
> +};

Brian
Boris BREZILLON Oct. 21, 2014, 12:53 p.m. UTC | #2
Hi Brian,

On Mon, 20 Oct 2014 19:41:34 -0700
Brian Norris <computersforpeace@gmail.com> wrote:

> Hi Boris,
> 
> On Mon, Oct 20, 2014 at 01:45:20PM +0200, Boris Brezillon wrote:
> > Add the sunxi NAND Flash Controller dt bindings documentation.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> >  .../devicetree/bindings/mtd/sunxi-nand.txt         | 45 ++++++++++++++++++++++
> >  1 file changed, 45 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> > new file mode 100644
> > index 0000000..0273adb
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> > @@ -0,0 +1,45 @@
> > +Allwinner NAND Flash Controller (NFC)
> > +
> > +Required properties:
> > +- compatible : "allwinner,sun4i-a10-nand".
> > +- reg : shall contain registers location and length for data and reg.
> > +- interrupts : shall define the nand controller interrupt.
> > +- #address-cells: shall be set to 1. Encode the nand CS.
> > +- #size-cells : shall be set to 0.
> > +- clocks : shall reference nand controller clocks.
> > +- clock-names : nand controller internal clock names. Shall contain :
> > +    * "ahb" : AHB gating clock
> > +    * "mod" : nand controller clock
> > +
> > +Optional children nodes:
> > +Children nodes represent the available nand chips.
> > +
> > +Optional properties:
> > +- allwinner,rb : shall contain the native Ready/Busy ids.
> > + or
> > +- rb-gpios : shall contain the gpios used as R/B pins.
> 
> I think you're relying on a named GPIO in your driver ("nand-rb"). That
> should be documented here.

Actually that's the name I assign to the pin when requesting it, this
has nothing to do with a specific property containing pin names for
specific gpio retrieval (as done for clocks with clock-names).

> 
> > +- nand-ecc-mode : one of the supported ECC modes ("hw", "hw_syndrome", "soft",
> > +  "soft_bch" or "none")
> 
> I think you're utilizing an undocumented 'nand-name' property for this
> node in your driver too. Please document it. (That also goes for any
> other undocumented properties I may have missed.)

I'll drop this nand-name property and let the NAND core code choose a
name for the MTD device according to the discovered NAND chip.

Thanks,

Boris
Boris BREZILLON Oct. 21, 2014, 1:48 p.m. UTC | #3
On Tue, 21 Oct 2014 06:13:16 -0700 (PDT)
Ezaul Zillmer <ezaulzillmer@gmail.com> wrote:

> Hello everyone 
> 
> Boris Brezillon 
> 
> downloaded sunxi-nand-v6 now compiled for Cubieboard2 
> https://github.com/bbrezillon/linux-sunxi.git sunxi b-nand-v6 
> 
> u-boot 
> git clone https://github.com/jwrdegoede/u-boot-b sunxi.git sunxi-wip 
> 
> 
> [1.143903] nand: Could not find valid JEDEC parameter page; aborting 
> [1.150369] nand: device found, Manufacturer ID: 0xec, Chip ID: 0xd7 
> [1.156766] nand: Samsung NAND 4GiB 3.3V 8-bit 
> [1.161214] nand: 4096MiB, MLC, page size: 8192, OOB size: 640 
> [1.167167] sunxi_nand 1c03000.nand: ECC init failed: -22 
> [1.172588] sunxi_nand 1c03000.nand: failed to init nand chips 
> [1.178502] sunxi_nand: probe of 1c03000.nand failed with error -22 
> 
> need some more data?

No, this is still the same problem you had last time you asked:

You haven't defined your NAND chip in the nand_ids table, and thus
strength and size fields of the nand_ecc_ctrl struct are undefined...

You'll have to retrieve the whole READ_ID sequence and add a proper
entry in the nand_ids table (see [1] for an example).

Regards,

Boris

[1]https://github.com/bbrezillon/linux-sunxi/commit/da96d64e6ece81e717bbdcad28caf0e5a9c40995
Boris BREZILLON Oct. 21, 2014, 1:58 p.m. UTC | #4
On Tue, 21 Oct 2014 06:13:16 -0700 (PDT)
Ezaul Zillmer <ezaulzillmer@gmail.com> wrote:

> Hello everyone 
> 
> Boris Brezillon 
> 
> downloaded sunxi-nand-v6 now compiled for Cubieboard2 
> https://github.com/bbrezillon/linux-sunxi.git sunxi b-nand-v6 
> 
> u-boot 
> git clone https://github.com/jwrdegoede/u-boot-b sunxi.git sunxi-wip 
> 
> 
> [1.143903] nand: Could not find valid JEDEC parameter page; aborting 
> [1.150369] nand: device found, Manufacturer ID: 0xec, Chip ID: 0xd7 
> [1.156766] nand: Samsung NAND 4GiB 3.3V 8-bit 
> [1.161214] nand: 4096MiB, MLC, page size: 8192, OOB size: 640 
> [1.167167] sunxi_nand 1c03000.nand: ECC init failed: -22 
> [1.172588] sunxi_nand 1c03000.nand: failed to init nand chips 
> [1.178502] sunxi_nand: probe of 1c03000.nand failed with error -22 
> 
> need some more data?
> 

Can you try to apply this patch [1] ?

[1]http://code.bulix.org/26bi35-87234
Boris BREZILLON Oct. 21, 2014, 4:01 p.m. UTC | #5
On Tue, 21 Oct 2014 08:03:57 -0700 (PDT)
Ezaul Zillmer <ezaulzillmer@gmail.com> wrote:

> results 
> {"K9GBG08U0A 32G 3.3V 8-bit",
> { .id = {0xec, 0xd7, 0x94, 0x7a, 0x54, 0x43} },
>   SZ_8K, SZ_4K, SZ_1M, 0, 6, 640, NAND_ECC_INFO(24, SZ_1K) },
> 
> 
> Start this in the attached image
> ..................................................................
> 
> [   20.127045] Bad eraseblock 2900 at 0x0000b54fe000
> [   20.134025] Bad eraseblock 2901 at 0x0000b55fe000
> [   20.140993] Bad eraseblock 2902 at 0x0000b56fe000
> [   20.147973] Bad eraseblock 2903 at 0x0000b57fe000
> [   20.154952] Bad eraseblock 2904 at 0x0000b58fe000
> [   20.161932] Bad eraseblock 2905 at 0x0000b59fe000
> [   20.168900] Bad eraseblock 2906 at 0x0000b5afe000
> [   20.175878] Bad eraseblock 2907 at 0x0000b5bfe000
> [   20.182861] Bad eraseblock 2908 at 0x0000b5cfe000
> [   20.189828] Bad eraseblock 2909 at 0x0000b5dfe000
> [   20.196810] Bad eraseblock 2910 at 0x0000b5efe000
> [   20.203790] Bad eraseblock 2911 at 0x0000b5ffe000
> [   20.210758] Bad eraseblock 2912 at 0x0000b60fe000
> [   20.217742] Bad eraseblock 2913 at 0x0000b61fe000
> [   20.224723] Bad eraseblock 2914 at 0x0000b62fe000
> [   20.231702] Bad eraseblock 2915 at 0x0000b63fe000
> [   20.238669] Bad eraseblock 2916 at 0x0000b64fe000
> [   20.245649] Bad eraseblock 2917 at 0x0000b65fe000
> [   20.252618] Bad eraseblock 2918 at 0x0000b66fe000
> [   20.259585] Bad eraseblock 2919 at 0x0000b67fe000
> [   20.266565] Bad eraseblock 2920 at 0x0000b68fe000
> [   20.273546] Bad eraseblock 2921 at 0x0000b69fe000
> [   20.280512] Bad eraseblock 2922 at 0x0000b6afe000
> [   20.287490] Bad eraseblock 2923 at 0x0000b6bfe000
> [   20.294468] Bad eraseblock 2924 at 0x0000b6cfe000
> [   20.301437] Bad eraseblock 2925 at 0x0000b6dfe000
> [   20.312741] Bad eraseblock 2928 at 0x000. ok
> 
> 
> I thought this docs of this samsung nand "K9GBG08U0A" that talves be useful 
> since you have more knowledge about it! so I can help you make the tests of 
> your support in nand cubieboard2.


You have to force bad block erasure to get rid of AW's libnand layout
(which is overriding bad block markers).

Please follow these steps:
1) apply this patch [1]
2) boot on your new kernel and launch
$ flash_erase /dev/mtd0 0 0
3) revert the patch
4) Boot on your new kernel

Most of your bad blocks should be gone after that...

[1]http://code.bulix.org/k2v1hx-87237
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
new file mode 100644
index 0000000..0273adb
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
@@ -0,0 +1,45 @@ 
+Allwinner NAND Flash Controller (NFC)
+
+Required properties:
+- compatible : "allwinner,sun4i-a10-nand".
+- reg : shall contain registers location and length for data and reg.
+- interrupts : shall define the nand controller interrupt.
+- #address-cells: shall be set to 1. Encode the nand CS.
+- #size-cells : shall be set to 0.
+- clocks : shall reference nand controller clocks.
+- clock-names : nand controller internal clock names. Shall contain :
+    * "ahb" : AHB gating clock
+    * "mod" : nand controller clock
+
+Optional children nodes:
+Children nodes represent the available nand chips.
+
+Optional properties:
+- allwinner,rb : shall contain the native Ready/Busy ids.
+ or
+- rb-gpios : shall contain the gpios used as R/B pins.
+- nand-ecc-mode : one of the supported ECC modes ("hw", "hw_syndrome", "soft",
+  "soft_bch" or "none")
+
+see Documentation/devicetree/mtd/nand.txt for generic bindings.
+
+
+Examples:
+nfc: nand@01c03000 {
+	compatible = "allwinner,sun4i-a10-nand";
+	reg = <0x01c03000 0x1000>;
+	interrupts = <0 37 1>;
+	clocks = <&ahb_gates 13>, <&nand_clk>;
+	clock-names = "ahb", "mod";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
+	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+		allwinner,rb = <0>;
+		nand-ecc-mode = "soft_bch";
+	};
+};