From patchwork Mon Oct 27 08:09:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 5158461 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2E0979F30B for ; Mon, 27 Oct 2014 08:15:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2131820165 for ; Mon, 27 Oct 2014 08:15:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1662320034 for ; Mon, 27 Oct 2014 08:15:52 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XifQZ-0004ad-SX; Mon, 27 Oct 2014 08:13:23 +0000 Received: from mail-lb0-x235.google.com ([2a00:1450:4010:c04::235]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XifQW-0004Pk-C1 for linux-arm-kernel@lists.infradead.org; Mon, 27 Oct 2014 08:13:21 +0000 Received: by mail-lb0-f181.google.com with SMTP id w7so645951lbi.12 for ; Mon, 27 Oct 2014 01:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=t5mPqKB0MX1U/lPaO158Q1OpG4PEtuGzYQmCFKe1uOg=; b=uac0QbawOh4JQbqh9FEqGfEdA7ICfanfmkhT1pN1F2DOHMlgcvUTKNP6h6/7EUrkWI toTrpM7kxm0344uJ4+skJGr6BqIdE9UTLm5biTnT6JSP4h44eJWcUy89gRbFbYK2qVVd saZX1/3huIFxyPYloZCTOFOqq8MKUTUVnwEHurYVPZ3hqkMSHMfmc5Q3Ncar6qohKGgg 0qP21iy9liDwFROWZqXSEQB7IfsGq9hjzcwjmO6/gA47OkORSpv/YjqfgLKbOuSHswoT FNLjdIXynJvtTMN7dsWg5hjLDj8kC1Ow6ADwrDOyI8vQ580W/VTQ568GKlNOfyOvXAmO CJkQ== X-Received: by 10.112.73.103 with SMTP id k7mr21735644lbv.41.1414397577479; Mon, 27 Oct 2014 01:12:57 -0700 (PDT) Received: from xi.terra (s83-177-171-8.cust.tele2.se. [83.177.171.8]) by mx.google.com with ESMTPSA id j6sm4695067lbs.9.2014.10.27.01.12.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Oct 2014 01:12:56 -0700 (PDT) Received: from johan by xi.terra with local (Exim 4.84) (envelope-from ) id 1XifN5-0006th-R0; Mon, 27 Oct 2014 09:09:47 +0100 From: Johan Hovold To: Alessandro Zummo , Tony Lindgren , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Felipe Balbi , Andrew Morton Subject: [PATCH v3] rtc: omap: add support for pmic_power_en Date: Mon, 27 Oct 2014 09:09:28 +0100 Message-Id: <1414397368-26480-1-git-send-email-johan@kernel.org> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1413913086-12730-1-git-send-email-johan@kernel.org> References: <1413913086-12730-1-git-send-email-johan@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141027_011320_782316_34D505B3 X-CRM114-Status: GOOD ( 23.06 ) X-Spam-Score: 0.0 (/) Cc: devicetree@vger.kernel.org, rtc-linux@googlegroups.com, Lokesh Vutla , j-keerthy@ti.com, nsekhar@ti.com, linux-kernel@vger.kernel.org, Johan Hovold , t-kristo@ti.com, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, Guenter Roeck X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add new property "ti,system-power-controller" to register the RTC as a power-off handler. Some RTC IP revisions can control an external PMIC via the pmic_power_en pin, which can be configured to transition to OFF on ALARM2 events and back to ON on subsequent ALARM (wakealarm) events. This is based on earlier work by Colin Foe-Parker and AnilKumar Ch. [1] [1] https://www.mail-archive.com/linux-omap@vger.kernel.org/msg82127.html Tested-by: Felipe Balbi Signed-off-by: Johan Hovold --- Changes since v2: - add two-second delay to allow alarm to trigger before returning Andrew, can you replace just this patch in the series that you already have in your tree, or do you prefer I resend the whole series (with Felipe's Tested-by tags)? Thanks, Johan Documentation/devicetree/bindings/rtc/rtc-omap.txt | 9 +- drivers/rtc/rtc-omap.c | 95 ++++++++++++++++++++++ 2 files changed, 103 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/rtc-omap.txt b/Documentation/devicetree/bindings/rtc/rtc-omap.txt index 5a0f02d34d95..750efd40c72e 100644 --- a/Documentation/devicetree/bindings/rtc/rtc-omap.txt +++ b/Documentation/devicetree/bindings/rtc/rtc-omap.txt @@ -5,11 +5,17 @@ Required properties: - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family. - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family. This RTC IP has special WAKE-EN Register to enable - Wakeup generation for event Alarm. + Wakeup generation for event Alarm. It can also be + used to control an external PMIC via the + pmic_power_en pin. - reg: Address range of rtc register set - interrupts: rtc timer, alarm interrupts in order - interrupt-parent: phandle for the interrupt controller +Optional properties: +- ti,system-power-controller: whether the rtc is controlling the system power + through pmic_power_en + Example: rtc@1c23000 { @@ -18,4 +24,5 @@ rtc@1c23000 { interrupts = <19 19>; interrupt-parent = <&intc>; + ti,system-power-controller; }; diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index c508e45ca3ce..87cfee751554 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -68,6 +68,15 @@ #define OMAP_RTC_IRQWAKEEN 0x7c +#define OMAP_RTC_ALARM2_SECONDS_REG 0x80 +#define OMAP_RTC_ALARM2_MINUTES_REG 0x84 +#define OMAP_RTC_ALARM2_HOURS_REG 0x88 +#define OMAP_RTC_ALARM2_DAYS_REG 0x8c +#define OMAP_RTC_ALARM2_MONTHS_REG 0x90 +#define OMAP_RTC_ALARM2_YEARS_REG 0x94 + +#define OMAP_RTC_PMIC_REG 0x98 + /* OMAP_RTC_CTRL_REG bit fields: */ #define OMAP_RTC_CTRL_SPLIT BIT(7) #define OMAP_RTC_CTRL_DISABLE BIT(6) @@ -80,6 +89,7 @@ /* OMAP_RTC_STATUS_REG bit fields: */ #define OMAP_RTC_STATUS_POWER_UP BIT(7) +#define OMAP_RTC_STATUS_ALARM2 BIT(7) #define OMAP_RTC_STATUS_ALARM BIT(6) #define OMAP_RTC_STATUS_1D_EVENT BIT(5) #define OMAP_RTC_STATUS_1H_EVENT BIT(4) @@ -89,6 +99,7 @@ #define OMAP_RTC_STATUS_BUSY BIT(0) /* OMAP_RTC_INTERRUPTS_REG bit fields: */ +#define OMAP_RTC_INTERRUPTS_IT_ALARM2 BIT(4) #define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3) #define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2) @@ -98,6 +109,9 @@ /* OMAP_RTC_IRQWAKEEN bit fields: */ #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1) +/* OMAP_RTC_PMIC bit fields: */ +#define OMAP_RTC_PMIC_POWER_EN_EN BIT(16) + /* OMAP_RTC_KICKER values */ #define KICK0_VALUE 0x83e70b13 #define KICK1_VALUE 0x95a4f1e0 @@ -106,6 +120,7 @@ struct omap_rtc_device_type { bool has_32kclk_en; bool has_kicker; bool has_irqwakeen; + bool has_pmic_mode; bool has_power_up_reset; }; @@ -115,6 +130,7 @@ struct omap_rtc { int irq_alarm; int irq_timer; u8 interrupts_reg; + bool is_pmic_controller; const struct omap_rtc_device_type *type; }; @@ -345,6 +361,65 @@ static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) return 0; } +static struct omap_rtc *omap_rtc_power_off_rtc; + +/* + * omap_rtc_poweroff: RTC-controlled power off + * + * The RTC can be used to control an external PMIC via the pmic_power_en pin, + * which can be configured to transition to OFF on ALARM2 events. + * + * Notes: + * The two-second alarm offset is the shortest offset possible as the alarm + * registers must be set before the next timer update and the offset + * calculation is too heavy for everything to be done within a single access + * period (~15us). + * + * Called with local interrupts disabled. + */ +static void omap_rtc_power_off(void) +{ + struct omap_rtc *rtc = omap_rtc_power_off_rtc; + struct rtc_time tm; + unsigned long now; + u32 val; + + /* enable pmic_power_en control */ + val = rtc_readl(rtc, OMAP_RTC_PMIC_REG); + rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN); + + /* set alarm two seconds from now */ + omap_rtc_read_time_raw(rtc, &tm); + bcd2tm(&tm); + rtc_tm_to_time(&tm, &now); + rtc_time_to_tm(now + 2, &tm); + + if (tm2bcd(&tm) < 0) { + dev_err(&rtc->rtc->dev, "power off failed\n"); + return; + } + + rtc_wait_not_busy(rtc); + + rtc_write(rtc, OMAP_RTC_ALARM2_SECONDS_REG, tm.tm_sec); + rtc_write(rtc, OMAP_RTC_ALARM2_MINUTES_REG, tm.tm_min); + rtc_write(rtc, OMAP_RTC_ALARM2_HOURS_REG, tm.tm_hour); + rtc_write(rtc, OMAP_RTC_ALARM2_DAYS_REG, tm.tm_mday); + rtc_write(rtc, OMAP_RTC_ALARM2_MONTHS_REG, tm.tm_mon); + rtc_write(rtc, OMAP_RTC_ALARM2_YEARS_REG, tm.tm_year); + + /* + * enable ALARM2 interrupt + * + * NOTE: this fails on AM3352 if rtc_write (writeb) is used + */ + val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG); + rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, + val | OMAP_RTC_INTERRUPTS_IT_ALARM2); + + mdelay(2000); +} + static struct rtc_class_ops omap_rtc_ops = { .read_time = omap_rtc_read_time, .set_time = omap_rtc_set_time, @@ -361,6 +436,7 @@ static const struct omap_rtc_device_type omap_rtc_am3352_type = { .has_32kclk_en = true, .has_kicker = true, .has_irqwakeen = true, + .has_pmic_mode = true, }; static const struct omap_rtc_device_type omap_rtc_da830_type = { @@ -412,6 +488,9 @@ static int __init omap_rtc_probe(struct platform_device *pdev) of_id = of_match_device(omap_rtc_of_match, &pdev->dev); if (of_id) { rtc->type = of_id->data; + rtc->is_pmic_controller = rtc->type->has_pmic_mode && + of_property_read_bool(pdev->dev.of_node, + "ti,system-power-controller"); } else { id_entry = platform_get_device_id(pdev); rtc->type = (void *)id_entry->driver_data; @@ -460,6 +539,9 @@ static int __init omap_rtc_probe(struct platform_device *pdev) mask = OMAP_RTC_STATUS_ALARM; + if (rtc->type->has_pmic_mode) + mask |= OMAP_RTC_STATUS_ALARM2; + if (rtc->type->has_power_up_reset) { mask |= OMAP_RTC_STATUS_POWER_UP; if (reg & OMAP_RTC_STATUS_POWER_UP) @@ -520,6 +602,13 @@ static int __init omap_rtc_probe(struct platform_device *pdev) goto err; } + if (rtc->is_pmic_controller) { + if (!pm_power_off) { + omap_rtc_power_off_rtc = rtc; + pm_power_off = omap_rtc_power_off; + } + } + return 0; err: @@ -536,6 +625,12 @@ static int __exit omap_rtc_remove(struct platform_device *pdev) { struct omap_rtc *rtc = platform_get_drvdata(pdev); + if (pm_power_off == omap_rtc_power_off && + omap_rtc_power_off_rtc == rtc) { + pm_power_off = NULL; + omap_rtc_power_off_rtc = NULL; + } + device_init_wakeup(&pdev->dev, 0); /* leave rtc running, but disable irqs */