From patchwork Mon Oct 27 11:05:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 5159541 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D8194C11AC for ; Mon, 27 Oct 2014 11:09:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EF6B32026C for ; Mon, 27 Oct 2014 11:09:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F369720254 for ; Mon, 27 Oct 2014 11:09:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xii8P-0005s3-OW; Mon, 27 Oct 2014 11:06:49 +0000 Received: from mailout4.w1.samsung.com ([210.118.77.14]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xii80-0005Mq-FK for linux-arm-kernel@lists.infradead.org; Mon, 27 Oct 2014 11:06:25 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NE300A1WOAK8W20@mailout4.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 27 Oct 2014 11:08:44 +0000 (GMT) X-AuditID: cbfec7f4-b7f6c6d00000120b-6a-544e271609dd Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id D0.4F.04619.6172E445; Mon, 27 Oct 2014 11:05:58 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NE300JBOO5RPJ10@eusync2.samsung.com>; Mon, 27 Oct 2014 11:05:58 +0000 (GMT) From: Marek Szyprowski To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v6 4/7] ARM: l2c: Add support for overriding prefetch settings Date: Mon, 27 Oct 2014 12:05:47 +0100 Message-id: <1414407950-3029-5-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1414407950-3029-1-git-send-email-m.szyprowski@samsung.com> References: <1414407950-3029-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNLMWRmVeSWpSXmKPExsVy+t/xK7pi6n4hBreX8Fs8mv+Y2aJ3wVU2 i7NNb9gttnfOYLeY8mc5k8Wmx9dYLS7vmsNmMXtJP4vFjPP7mCxuX+a1OLd9C4vF2iN32S2W Xr/IZPG6bw2zxapdfxgt9l/xchDwWDNvDaNHS3MPm8e3r5NYPC739TJ5LPqe5bFz1l12jzvX 9rB5bF5S79G3ZRWjx/Eb25k8Pm+SC+CO4rJJSc3JLEst0rdL4MqYcai+4LFCRee3fywNjP+l uhg5OSQETCTu7nvMCmGLSVy4t56ti5GLQ0hgKaPEk01dLCAJIYE+JomLV/xBbDYBQ4mut11s ILaIQLbEj2+TWUAamAVWMUtMObAOaBIHh7CAn8SzO5YgNSwCqhLvpxxhBrF5Bdwltm69yQKx TE7i/8sVTCA2p4CHxOSWmUwQu9wlVn3YyziBkXcBI8MqRtHU0uSC4qT0XEO94sTc4tK8dL3k /NxNjJAA/7KDcfExq0OMAhyMSjy8O6b5hgixJpYVV+YeYpTgYFYS4XX8CRTiTUmsrEotyo8v Ks1JLT7EyMTBKdXA6KMh8ezAnw3dk2ac2NeakfP9wry6n77AoN7OvTDvyuXD7CFvTjzJS274 JswSNuHnBu59Eb8O/5kfcmqZwMHM8l3+8uqWOUdcJJYtsl10zmvat+Ip2/L4Q9PVupRTvBjX /i5mWP750sfeAz8aHq6qbLpybHPv0ZU/trbNqLlwZVdhsvAyMz71aiWW4oxEQy3mouJEANPF qWZOAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141027_040624_652446_5D5ACB86 X-CRM114-Status: GOOD ( 13.30 ) X-Spam-Score: -5.6 (-----) Cc: Mark Rutland , Kukjin Kim , lauraa@codeaurora.org, tony@atomide.com, linus.walleij@linaro.org, Tomasz Figa , drake@endlessm.com, loeliger@gmail.com, Kyungmin Park , santosh.shilimkar@ti.com, Russell King - ARM Linux , linux-omap@vger.kernel.org, Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Figa Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch settings configured in registers leading to crashes if L2C is enabled without overriding them. This patch introduces bindings to enable prefetch settings to be specified from DT and necessary support in the driver. Signed-off-by: Tomasz Figa [mszyprow: rebased onto v3.18-rc1, added error messages when property value is missing] Signed-off-by: Marek Szyprowski --- Documentation/devicetree/bindings/arm/l2cc.txt | 10 +++++ arch/arm/mm/cache-l2x0.c | 55 ++++++++++++++++++++++++++ 2 files changed, 65 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt index 292ef7ca3058..0dbabe9a6b0a 100644 --- a/Documentation/devicetree/bindings/arm/l2cc.txt +++ b/Documentation/devicetree/bindings/arm/l2cc.txt @@ -57,6 +57,16 @@ Optional properties: - cache-id-part: cache id part number to be used if it is not present on hardware - wt-override: If present then L2 is forced to Write through mode +- arm,double-linefill : Override double linefill enable setting. Enable if + non-zero, disable if zero. +- arm,double-linefill-incr : Override double linefill on INCR read. Enable + if non-zero, disable if zero. +- arm,double-linefill-wrap : Override double linefill on WRAP read. Enable + if non-zero, disable if zero. +- arm,prefetch-drop : Override prefetch drop enable setting. Enable if non-zero, + disable if zero. +- arm,prefetch-offset : Override prefetch offset value. Valid values are + 0-7, 15, 23, and 31. Example: diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index ad981894de73..69cfa8359ed3 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1163,6 +1163,9 @@ static void __init l2c310_of_parse(const struct device_node *np, u32 tag[3] = { 0, 0, 0 }; u32 filter[2] = { 0, 0 }; u32 assoc; + u32 prefetch; + u32 val; + int ret; of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag)); if (tag[0] && tag[1] && tag[2]) @@ -1204,6 +1207,58 @@ static void __init l2c310_of_parse(const struct device_node *np, pr_err("PL310 OF: %d calculated, only 8 and 16 legal\n", assoc); break; } + + prefetch = l2x0_saved_regs.prefetch_ctrl; + + ret = of_property_read_u32(np, "arm,double-linefill", &val); + if (ret == 0) { + if (val) + prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL; + else + prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL; + } else if (ret != -EINVAL) { + pr_err("PL310 OF: missing value for arm,double-linefill property\n"); + } + + ret = of_property_read_u32(np, "arm,double-linefill-incr", &val); + if (ret == 0) { + if (val) + prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; + else + prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; + } else if (ret != -EINVAL) { + pr_err("PL310 OF: missing value for arm,double-linefill-incr property\n"); + } + + ret = of_property_read_u32(np, "arm,double-linefill-wrap", &val); + if (ret == 0) { + if (!val) + prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP; + else + prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP; + } else if (ret != -EINVAL) { + pr_err("PL310 OF: missing value for arm,double-linefill-wrap property\n"); + } + + ret = of_property_read_u32(np, "arm,prefetch-drop", &val); + if (ret == 0) { + if (val) + prefetch |= L310_PREFETCH_CTRL_PREFETCH_DROP; + else + prefetch &= ~L310_PREFETCH_CTRL_PREFETCH_DROP; + } else if (ret != -EINVAL) { + pr_err("PL310 OF: missing value for arm,prefetch-drop property\n"); + } + + ret = of_property_read_u32(np, "arm,prefetch-offset", &val); + if (ret == 0) { + prefetch &= ~L310_PREFETCH_CTRL_OFFSET_MASK; + prefetch |= val & L310_PREFETCH_CTRL_OFFSET_MASK; + } else if (ret != -EINVAL) { + pr_err("PL310 OF: missing value for arm,prefetch-offset property\n"); + } + + l2x0_saved_regs.prefetch_ctrl = prefetch; } static const struct l2c_init_data of_l2c310_data __initconst = {