From patchwork Tue Oct 28 08:26:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 5173001 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id ECC43C11AC for ; Tue, 28 Oct 2014 08:31:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0DFF820166 for ; Tue, 28 Oct 2014 08:31:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 22AF3200E6 for ; Tue, 28 Oct 2014 08:31:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xj29H-0000is-Rd; Tue, 28 Oct 2014 08:29:03 +0000 Received: from mga03.intel.com ([134.134.136.65]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xj26c-0006SD-7d for linux-arm-kernel@lists.infradead.org; Tue, 28 Oct 2014 08:26:18 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 28 Oct 2014 01:24:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,801,1406617200"; d="scan'208";a="597494195" Received: from gerry-dev.bj.intel.com ([10.238.158.215]) by orsmga001.jf.intel.com with ESMTP; 28 Oct 2014 01:26:12 -0700 From: Jiang Liu To: Benjamin Herrenschmidt , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , "Rafael J. Wysocki" , Bjorn Helgaas , Randy Dunlap , Yinghai Lu , Borislav Petkov , Grant Likely , Marc Zyngier , Yingjoe Chen , Joerg Roedel , Matthias Brugger Subject: [Patch Part2 v3 11/24] iommu/vt-d: Change prototypes to prepare for enabling hierarchy irqdomain Date: Tue, 28 Oct 2014 16:26:29 +0800 Message-Id: <1414484803-10311-12-git-send-email-jiang.liu@linux.intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1414484803-10311-1-git-send-email-jiang.liu@linux.intel.com> References: <1414484803-10311-1-git-send-email-jiang.liu@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141028_012618_342777_6E89EA0C X-CRM114-Status: GOOD ( 15.34 ) X-Spam-Score: -5.6 (-----) Cc: Tony Luck , Konrad Rzeszutek Wilk , Greg Kroah-Hartman , x86@kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, linux-pci@vger.kernel.org, Andrew Morton , Jiang Liu , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Prepare for support hierarchy irqdomain by changing function prototypes, should be no function changes. Signed-off-by: Jiang Liu --- drivers/iommu/intel_irq_remapping.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index fd181cf8a589..5acad492701e 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c @@ -82,10 +82,10 @@ static int get_irte(int irq, struct irte *entry) return 0; } -static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count) +static int alloc_irte(struct intel_iommu *iommu, int irq, + struct irq_2_iommu *irq_iommu, u16 count) { struct ir_table *table = iommu->ir_table; - struct irq_2_iommu *irq_iommu = irq_2_iommu(irq); struct irq_cfg *cfg = irq_cfg(irq); unsigned int mask = 0; unsigned long flags; @@ -173,9 +173,9 @@ static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subha return 0; } -static int modify_irte(int irq, struct irte *irte_modified) +static int modify_irte(struct irq_2_iommu *irq_iommu, + struct irte *irte_modified) { - struct irq_2_iommu *irq_iommu = irq_2_iommu(irq); struct intel_iommu *iommu; unsigned long flags; struct irte *irte; @@ -242,7 +242,7 @@ static int clear_entries(struct irq_2_iommu *irq_iommu) return 0; iommu = irq_iommu->iommu; - index = irq_iommu->irte_index + irq_iommu->sub_handle; + index = irq_iommu->irte_index; start = iommu->ir_table->base + index; end = start + (1 << irq_iommu->irte_mask); @@ -937,7 +937,7 @@ static int intel_setup_ioapic_entry(int irq, pr_warn("No mapping iommu for ioapic %d\n", ioapic_id); index = -ENODEV; } else { - index = alloc_irte(iommu, irq, 1); + index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1); if (index < 0) { pr_warn("Failed to allocate IRTE for ioapic %d\n", ioapic_id); @@ -953,7 +953,7 @@ static int intel_setup_ioapic_entry(int irq, /* Set source-id of interrupt request */ set_ioapic_sid(&irte, ioapic_id); - modify_irte(irq, &irte); + modify_irte(irq_2_iommu(irq), &irte); apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: " "Set IRTE entry (P:%d FPD:%d Dst_Mode:%d " @@ -1040,7 +1040,7 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask, * Atomically updates the IRTE with the new destination, vector * and flushes the interrupt entry cache. */ - modify_irte(irq, &irte); + modify_irte(irq_2_iommu(irq), &irte); /* * After this point, all the interrupts will start arriving @@ -1076,7 +1076,7 @@ static void intel_compose_msi_msg(struct pci_dev *pdev, else set_hpet_sid(&irte, hpet_id); - modify_irte(irq, &irte); + modify_irte(irq_2_iommu(irq), &irte); msg->address_hi = MSI_ADDR_BASE_HI; msg->data = sub_handle; @@ -1103,7 +1103,7 @@ static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec) "Unable to map PCI %s to iommu\n", pci_name(dev)); index = -ENOENT; } else { - index = alloc_irte(iommu, irq, nvec); + index = alloc_irte(iommu, irq, irq_2_iommu(irq), nvec); if (index < 0) { printk(KERN_ERR "Unable to allocate %d IRTE for PCI %s\n", @@ -1147,7 +1147,7 @@ static int intel_alloc_hpet_msi(unsigned int irq, unsigned int id) down_read(&dmar_global_lock); iommu = map_hpet_to_ir(id); if (iommu) { - index = alloc_irte(iommu, irq, 1); + index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1); if (index >= 0) ret = 0; }