From patchwork Fri Oct 31 04:27:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 5202181 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C17BEC11AC for ; Fri, 31 Oct 2014 04:30:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A04BF201CD for ; Fri, 31 Oct 2014 04:30:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BB3FF20172 for ; Fri, 31 Oct 2014 04:30:51 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xk3oz-0006PD-93; Fri, 31 Oct 2014 04:28:21 +0000 Received: from mail-pa0-f46.google.com ([209.85.220.46]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xk3oO-0006Fw-Ht for linux-arm-kernel@lists.infradead.org; Fri, 31 Oct 2014 04:27:45 +0000 Received: by mail-pa0-f46.google.com with SMTP id lf10so6851307pab.19 for ; Thu, 30 Oct 2014 21:27:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PhOinKkWkByjZso6O7YizRuo6xBejO3auZUtgqnAZJw=; b=bgTo73y6Go5elsCNcCY22O6TbNT2duxai5fk3ULnB/pVmKxd7c63HnzQKbZUmR5mcH eCXF4R0JJ16c+4B1yoO+DCpOKiSyQCcpQDqEzsaXDguKLqiYtlzWCqObQ4agk4N7NnZW C6kbCsrvAJq7VWQqrtP8wbxwODMh9LiGrLQ6XIPU827m819TUSwg1llpQuv49l+9D42A fVlPJoH82u6+/xlZtiaQfmR983fI70KgEW5mrQD72CplowJho0Xku2O+YQKwzEf0Z00b kPDIq8SU/GcCuDovHANzSDmphA8hDDPMyKiHCXtWI8o1WSbvJQ7Pqy5efXLw4Tu3/UJF bUaA== X-Gm-Message-State: ALoCoQnK4j9iFn62cLnYAZelxI3vvQCmIAPAr8Yzy6teJtE0MQ04Iiep0jhJkjJ47MLoe1xLwQzg X-Received: by 10.68.141.4 with SMTP id rk4mr22329815pbb.54.1414729643350; Thu, 30 Oct 2014 21:27:23 -0700 (PDT) Received: from tharvey-gw.gw (68-189-91-139.static.snlo.ca.charter.com. [68.189.91.139]) by mx.google.com with ESMTPSA id mp5sm8542239pbc.33.2014.10.30.21.27.22 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 30 Oct 2014 21:27:22 -0700 (PDT) From: Tim Harvey To: linux-kernel@vger.kernel.org Subject: [PATCH 4/5] cpufreq: imx6q: add ldo-bypass support Date: Thu, 30 Oct 2014 21:27:10 -0700 Message-Id: <1414729631-11005-5-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1414729631-11005-1-git-send-email-tharvey@gateworks.com> References: <1414729631-11005-1-git-send-email-tharvey@gateworks.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141030_212744_685091_636BCF3D X-CRM114-Status: GOOD ( 15.63 ) X-Spam-Score: -0.7 (/) Cc: Silvio F , linux-arm-kernel@lists.infradead.org, Philipp Zabel , Christian Hemp , Russell King , Iain Paton , Fabio Estevam , Shawn Guo , Lucas Stach X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When an external PMIC is used for VDD_SOC and VDD_ARM you can save power by bypassing the internal LDO's provided by the anantop regulator as long as you are running less than 1.2GHz. If running at 1.2GHz the IMX6 datasheets state that you must use the internal LDO's to reduce ripple on the suplies. A failure to bypass the LDO's when using an external PMIC will result in an extra voltage drop (~125mV) between VDD_ARM_IN and VDD_ARM and VDD_SOC_IN and VDD_SOC which violates the voltages specificed by the datasheets. Cc: Philipp Zabel Cc: Shawn Guo Signed-off-by: Tim Harvey --- drivers/cpufreq/imx6q-cpufreq.c | 51 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index c2d3076..fc69f36 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -159,6 +159,9 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) int num, ret; const struct property *prop; const __be32 *val; + struct regulator *anatop_arm_reg = NULL; + struct regulator *anatop_pu_reg = NULL; + struct regulator *anatop_soc_reg = NULL; u32 nr, i, j; cpu_dev = get_cpu_device(0); @@ -167,6 +170,20 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) return -ENODEV; } + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); + if (np) { + anatop_arm_reg = regulator_get(&pdev->dev, "vddarm"); + anatop_pu_reg = regulator_get(&pdev->dev, "vddpu"); + anatop_soc_reg = regulator_get(&pdev->dev, "vddsoc"); + if (PTR_ERR(anatop_arm_reg) == -EPROBE_DEFER || + PTR_ERR(anatop_pu_reg) == -EPROBE_DEFER || + PTR_ERR(anatop_soc_reg) == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; + goto put_reg; + } + of_node_put(np); + } + np = of_node_get(cpu_dev->of_node); if (!np) { dev_err(cpu_dev, "failed to find cpu0 node\n"); @@ -301,7 +318,41 @@ soc_opp_out: goto free_freq_table; } + /* enable LDO bypass mode if anatop regs are not being used for core */ + if ((!IS_ERR(anatop_arm_reg) && + !IS_ERR(anatop_pu_reg) && + !IS_ERR(anatop_soc_reg) && + regulator_is_same(arm_reg, anatop_arm_reg) && + regulator_is_same(pu_reg, anatop_pu_reg) && + regulator_is_same(soc_reg, anatop_soc_reg)) || + (freq_table[num].frequency == FREQ_1P2_GHZ / 1000)) + { + printk("Using anatop regulators: LDO enabled\n"); + } else { + int puvolt = regulator_get_voltage(anatop_pu_reg); + + printk("Not using anatop LDO's: enabling LDO bypass\n"); + regulator_allow_bypass(anatop_arm_reg, true); + regulator_allow_bypass(anatop_pu_reg, true); + if (regulator_is_same(pu_reg, anatop_pu_reg)) + regulator_allow_bypass(pu_reg, true); + regulator_allow_bypass(anatop_soc_reg, true); + if (!regulator_is_bypass(anatop_arm_reg) || + !regulator_is_bypass(anatop_pu_reg) || + !regulator_is_bypass(anatop_soc_reg)) + dev_err(cpu_dev, "failed to set LDO bypass\n"); + else { + if (puvolt == 0) + regulator_set_voltage(anatop_pu_reg, 0, 0); + } + + } + regulator_put(anatop_arm_reg); + regulator_put(anatop_pu_reg); + regulator_put(anatop_soc_reg); + of_node_put(np); + return 0; free_freq_table: