From patchwork Sun Nov 9 15:10:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 5261241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A5F83C11AC for ; Sun, 9 Nov 2014 15:12:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C098620158 for ; Sun, 9 Nov 2014 15:12:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E27DD20115 for ; Sun, 9 Nov 2014 15:12:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XnU77-0004yc-Ot; Sun, 09 Nov 2014 15:09:13 +0000 Received: from mga09.intel.com ([134.134.136.24]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XnU6j-0004Uy-Kb for linux-arm-kernel@lists.infradead.org; Sun, 09 Nov 2014 15:08:50 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 09 Nov 2014 07:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,346,1413270000"; d="scan'208";a="604933074" Received: from gerry-dev.bj.intel.com ([10.238.158.52]) by orsmga001.jf.intel.com with ESMTP; 09 Nov 2014 07:08:44 -0800 From: Jiang Liu To: Bjorn Helgaas , Benjamin Herrenschmidt , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , "Rafael J. Wysocki" , Randy Dunlap , Yinghai Lu , Borislav Petkov , Grant Likely , Marc Zyngier , Yingjoe Chen , x86@kernel.org, Matthias Brugger , Jiang Liu , Yijing Wang , Alexander Gordeev Subject: [RFC Part4 v1 07/17] x86, irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips Date: Sun, 9 Nov 2014 23:10:29 +0800 Message-Id: <1415545839-28263-8-git-send-email-jiang.liu@linux.intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1415545839-28263-1-git-send-email-jiang.liu@linux.intel.com> References: <1415545839-28263-1-git-send-email-jiang.liu@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141109_070849_758999_B9788D51 X-CRM114-Status: GOOD ( 17.95 ) X-Spam-Score: -5.3 (-----) Cc: Tony Luck , Konrad Rzeszutek Wilk , Greg Kroah-Hartman , Joerg Roedel , linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, Andrew Morton , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_RHS_DOB autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips, they will be used to share common code later. Signed-off-by: Jiang Liu --- arch/x86/kernel/apic/msi.c | 14 ++++++++++++++ drivers/pci/msi.c | 15 +++++++++++++-- include/linux/msi.h | 1 + 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c index 0b2261fe6adf..842d71699912 100644 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -65,6 +65,7 @@ static struct irq_chip msi_chip = { .irq_set_affinity = msi_domain_set_affinity, .irq_retrigger = irq_chip_retrigger_hierarchy, .irq_compose_msi_msg = msi_compose_msg, + .irq_write_msi_msg = pci_msi_write_msg, .flags = IRQCHIP_SKIP_SET_WAKE, }; @@ -128,6 +129,7 @@ static struct irq_chip msi_ir_chip = { .irq_ack = irq_chip_ack_parent, .irq_set_affinity = msi_domain_set_affinity, .irq_retrigger = irq_chip_retrigger_hierarchy, + .irq_write_msi_msg = pci_msi_write_msg, .flags = IRQCHIP_SKIP_SET_WAKE, }; @@ -155,6 +157,11 @@ dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask, return ret; } +static void dmar_msi_write_msg(struct irq_data *data, struct msi_msg *msg) +{ + dmar_msi_write(data->irq, msg); +} + static struct irq_chip dmar_msi_type = { .name = "DMAR-MSI", .irq_unmask = dmar_msi_unmask, @@ -163,6 +170,7 @@ static struct irq_chip dmar_msi_type = { .irq_set_affinity = dmar_msi_set_affinity, .irq_retrigger = irq_chip_retrigger_hierarchy, .irq_compose_msi_msg = msi_compose_msg, + .irq_write_msi_msg = dmar_msi_write_msg, .flags = IRQCHIP_SKIP_SET_WAKE, }; @@ -285,6 +293,11 @@ static int hpet_msi_set_affinity(struct irq_data *data, return ret; } +static void hpet_msi_write_msg(struct irq_data *data, struct msi_msg *msg) +{ + hpet_msi_write(data->handler_data, msg); +} + static struct irq_chip hpet_msi_type = { .name = "HPET-MSI", .irq_unmask = hpet_msi_unmask, @@ -293,6 +306,7 @@ static struct irq_chip hpet_msi_type = { .irq_set_affinity = hpet_msi_set_affinity, .irq_retrigger = irq_chip_retrigger_hierarchy, .irq_compose_msi_msg = msi_compose_msg, + .irq_write_msi_msg = hpet_msi_write_msg, .flags = IRQCHIP_SKIP_SET_WAKE, }; diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 49a8bd37189d..b811739b43c5 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -1117,6 +1117,18 @@ int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, return ret; } +void pci_msi_write_msg(struct irq_data *irq_data, struct msi_msg *msg) +{ + struct msi_desc *desc = irq_data->msi_desc; + + /* + * MSI-X message is written per-IRQ. + * MSI message denotes a contiguous group of IRQs, written for 0th IRQ. + */ + if (desc->irq == irq_data->irq) + __write_msi_msg(desc, msg); +} + /* * Generate a unique ID number for each possible MSI source, the ID number * is only used within the irqdomain. @@ -1144,8 +1156,7 @@ static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, for (i = 0; i < nr_irqs; i++) { irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, - domain->host_data, - (void *)(long)i); + domain->host_data, NULL); __irq_set_handler(virq + i, handle_edge_irq, 0, "edge"); } diff --git a/include/linux/msi.h b/include/linux/msi.h index daea96489a39..312197f64070 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -84,6 +84,7 @@ int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, struct irq_domain *msi_create_irq_domain(struct device_node *of_node, struct irq_chip *chip, struct irq_domain *parent); +void pci_msi_write_msg(struct irq_data *irq_data, struct msi_msg *msg); int msi_irq_domain_alloc_irqs(struct irq_domain *domain, int type, struct pci_dev *dev, void *arg);