| Message ID | 1415738970-7963-1-git-send-email-olof@lixom.net (mailing list archive) |
|---|---|
| State | New, archived |
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On 11/11/2014 01:49 PM, Olof Johansson wrote: > There are general changes pending to make the /aliases/serial* entries > number the serial ports on the system. On tegra, so far the ports have been > just numbered dynamically as they are configured so that makes them change. > > To avoid this, add specific aliases per board to keep the old numbers. This > allows us to change the numbering by default on future SoCs while keeping the > numbering on existing boards. This change seems mostly OK to me. FWIW though, I had suggested this approach when the UART aliases were first added, and Laxman disagreed with it. See commit b6551bb933f9 "ARM: tegra: dts: add aliases and DMA requestor for serial controller", and its discussion: https://lkml.org/lkml/2012/12/25/4. I've CC'd Laxman in case he still objects. > Signed-off-by: Olof Johansson <olof@lixom.net> > --- > > Stephen/Thierry/Alex, as noticed this week we really should try to get > this in before the 3.19 merge window so that the global aliases change > can happen there without regression. How did we resolve the issue that patch causes with old DTs; namely that it causes a change in behaviour for those old DTs? On IRC, I'd wondered whether we should set a flag so the kernel ignored aliases for boards containing currently upstreamed Tegra SoCs so that issue wouldn't occur. If we did that, we wouldn't need this patch.
[again in plain text mode. Sigh] On Tue, Nov 11, 2014 at 1:14 PM, Stephen Warren <swarren@wwwdotorg.org> wrote: > On 11/11/2014 01:49 PM, Olof Johansson wrote: >> >> There are general changes pending to make the /aliases/serial* entries >> number the serial ports on the system. On tegra, so far the ports have >> been >> just numbered dynamically as they are configured so that makes them >> change. >> >> To avoid this, add specific aliases per board to keep the old numbers. >> This >> allows us to change the numbering by default on future SoCs while keeping >> the >> numbering on existing boards. > > > This change seems mostly OK to me. FWIW though, I had suggested this > approach when the UART aliases were first added, and Laxman disagreed with > it. See commit b6551bb933f9 "ARM: tegra: dts: add aliases and DMA requestor > for serial controller", and its discussion: > https://lkml.org/lkml/2012/12/25/4. I've CC'd Laxman in case he still > objects. > >> Signed-off-by: Olof Johansson <olof@lixom.net> >> --- >> >> Stephen/Thierry/Alex, as noticed this week we really should try to get >> this in before the 3.19 merge window so that the global aliases change >> can happen there without regression. > > > How did we resolve the issue that patch causes with old DTs; namely that it > causes a change in behaviour for those old DTs? On IRC, I'd wondered whether > we should set a flag so the kernel ignored aliases for boards containing > currently upstreamed Tegra SoCs so that issue wouldn't occur. If we did > that, we wouldn't need this patch. Another way could be to remove aliases from the kernel side during booting if they're found. Anyway, feel free to send a patch to do that if that's your preference. Thanks, -Olof
On 11/11/2014 03:45 PM, Olof Johansson wrote: > [again in plain text mode. Sigh] > > > On Tue, Nov 11, 2014 at 1:14 PM, Stephen Warren <swarren@wwwdotorg.org> wrote: >> On 11/11/2014 01:49 PM, Olof Johansson wrote: >>> >>> There are general changes pending to make the /aliases/serial* entries >>> number the serial ports on the system. On tegra, so far the ports have >>> been >>> just numbered dynamically as they are configured so that makes them >>> change. >>> >>> To avoid this, add specific aliases per board to keep the old numbers. >>> This >>> allows us to change the numbering by default on future SoCs while keeping >>> the >>> numbering on existing boards. >> >> >> This change seems mostly OK to me. FWIW though, I had suggested this >> approach when the UART aliases were first added, and Laxman disagreed with >> it. See commit b6551bb933f9 "ARM: tegra: dts: add aliases and DMA requestor >> for serial controller", and its discussion: >> https://lkml.org/lkml/2012/12/25/4. I've CC'd Laxman in case he still >> objects. >> >>> Signed-off-by: Olof Johansson <olof@lixom.net> >>> --- >>> >>> Stephen/Thierry/Alex, as noticed this week we really should try to get >>> this in before the 3.19 merge window so that the global aliases change >>> can happen there without regression. >> >> >> How did we resolve the issue that patch causes with old DTs; namely that it >> causes a change in behaviour for those old DTs? On IRC, I'd wondered whether >> we should set a flag so the kernel ignored aliases for boards containing >> currently upstreamed Tegra SoCs so that issue wouldn't occur. If we did >> that, we wouldn't need this patch. > > Another way could be to remove aliases from the kernel side during > booting if they're found. Anyway, feel free to send a patch to do that > if that's your preference. That would work too. I'll let Thierry make the call re: whether it's important to support old DTs with the current aliase content without a change in device names when booted on a newer kernel. If not, as I mentioned, I'm fine with this patch.
Am Dienstag, den 11.11.2014, 14:14 -0700 schrieb Stephen Warren: > On 11/11/2014 01:49 PM, Olof Johansson wrote: > > There are general changes pending to make the /aliases/serial* entries > > number the serial ports on the system. On tegra, so far the ports have been > > just numbered dynamically as they are configured so that makes them change. > > > > To avoid this, add specific aliases per board to keep the old numbers. This > > allows us to change the numbering by default on future SoCs while keeping the > > numbering on existing boards. > > This change seems mostly OK to me. FWIW though, I had suggested this > approach when the UART aliases were first added, and Laxman disagreed > with it. See commit b6551bb933f9 "ARM: tegra: dts: add aliases and DMA > requestor for serial controller", and its discussion: > https://lkml.org/lkml/2012/12/25/4. I've CC'd Laxman in case he still > objects. > > > Signed-off-by: Olof Johansson <olof@lixom.net> > > --- > > > > Stephen/Thierry/Alex, as noticed this week we really should try to get > > this in before the 3.19 merge window so that the global aliases change > > can happen there without regression. > > How did we resolve the issue that patch causes with old DTs; namely that > it causes a change in behaviour for those old DTs? On IRC, I'd wondered > whether we should set a flag so the kernel ignored aliases for boards > containing currently upstreamed Tegra SoCs so that issue wouldn't occur. > If we did that, we wouldn't need this patch. > I don't think this is a workable solution. With bootloaders that understand the aliases (like Barebox) this will lead to an incoherent behavior between kernel and bootloader. Either we don't have any aliases at all, or we respect them in both kernel and firmware in the same way. I think this change is the only sane solution to not change behavior on old bootloaders, while providing a fixed numbering for the serial ports. Regards, Lucas
On Tue, Nov 11, 2014 at 12:49:30PM -0800, Olof Johansson wrote: > There are general changes pending to make the /aliases/serial* entries > number the serial ports on the system. On tegra, so far the ports have been > just numbered dynamically as they are configured so that makes them change. > > To avoid this, add specific aliases per board to keep the old numbers. This > allows us to change the numbering by default on future SoCs while keeping the > numbering on existing boards. > > Signed-off-by: Olof Johansson <olof@lixom.net> > --- > > Stephen/Thierry/Alex, as noticed this week we really should try to get > this in before the 3.19 merge window so that the global aliases change > can happen there without regression. > > If you have more fixes queued up, feel free to add this to the next pull > request. If not, a review and ack would be appreciated. > > arch/arm/boot/dts/tegra114-dalmore.dts | 1 + > arch/arm/boot/dts/tegra114-roth.dts | 4 ++++ > arch/arm/boot/dts/tegra114-tn7.dts | 4 ++++ > arch/arm/boot/dts/tegra114.dtsi | 7 ------- > arch/arm/boot/dts/tegra124-jetson-tk1.dts | 1 + > arch/arm/boot/dts/tegra124-nyan-big.dts | 1 + > arch/arm/boot/dts/tegra124-venice2.dts | 1 + > arch/arm/boot/dts/tegra124.dtsi | 7 ------- > arch/arm/boot/dts/tegra20-harmony.dts | 1 + > arch/arm/boot/dts/tegra20-iris-512.dts | 5 +++++ > arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ > arch/arm/boot/dts/tegra20-paz00.dts | 2 ++ > arch/arm/boot/dts/tegra20-seaboard.dts | 1 + > arch/arm/boot/dts/tegra20-tamonten.dtsi | 1 + > arch/arm/boot/dts/tegra20-trimslice.dts | 1 + > arch/arm/boot/dts/tegra20-ventana.dts | 1 + > arch/arm/boot/dts/tegra20-whistler.dts | 1 + > arch/arm/boot/dts/tegra20.dtsi | 8 -------- > arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ > arch/arm/boot/dts/tegra30-beaver.dts | 1 + > arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 ++ > arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +++ > arch/arm/boot/dts/tegra30.dtsi | 8 -------- > 23 files changed, 39 insertions(+), 30 deletions(-) I have applied this to the for-3.19/dt branch. So for anything that is post Tegra124 the new rule shall be to add aliases to the SoC .dtsi and then use consistent numbering of UART ports across boards? The alternative is to remain consistent with what this patch does, which would be to make the serial port numbering a property of the board. That doesn't sound too bad to me either since it'll hide all the unused ports on a given board. Thierry
Hi Thierry, On Wed, Nov 12, 2014 at 4:20 AM, Thierry Reding <thierry.reding@gmail.com> wrote: > On Tue, Nov 11, 2014 at 12:49:30PM -0800, Olof Johansson wrote: >> There are general changes pending to make the /aliases/serial* entries >> number the serial ports on the system. On tegra, so far the ports have been >> just numbered dynamically as they are configured so that makes them change. >> >> To avoid this, add specific aliases per board to keep the old numbers. This >> allows us to change the numbering by default on future SoCs while keeping the >> numbering on existing boards. >> >> Signed-off-by: Olof Johansson <olof@lixom.net> >> --- >> >> Stephen/Thierry/Alex, as noticed this week we really should try to get >> this in before the 3.19 merge window so that the global aliases change >> can happen there without regression. >> >> If you have more fixes queued up, feel free to add this to the next pull >> request. If not, a review and ack would be appreciated. >> >> arch/arm/boot/dts/tegra114-dalmore.dts | 1 + >> arch/arm/boot/dts/tegra114-roth.dts | 4 ++++ >> arch/arm/boot/dts/tegra114-tn7.dts | 4 ++++ >> arch/arm/boot/dts/tegra114.dtsi | 7 ------- >> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 1 + >> arch/arm/boot/dts/tegra124-nyan-big.dts | 1 + >> arch/arm/boot/dts/tegra124-venice2.dts | 1 + >> arch/arm/boot/dts/tegra124.dtsi | 7 ------- >> arch/arm/boot/dts/tegra20-harmony.dts | 1 + >> arch/arm/boot/dts/tegra20-iris-512.dts | 5 +++++ >> arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ >> arch/arm/boot/dts/tegra20-paz00.dts | 2 ++ >> arch/arm/boot/dts/tegra20-seaboard.dts | 1 + >> arch/arm/boot/dts/tegra20-tamonten.dtsi | 1 + >> arch/arm/boot/dts/tegra20-trimslice.dts | 1 + >> arch/arm/boot/dts/tegra20-ventana.dts | 1 + >> arch/arm/boot/dts/tegra20-whistler.dts | 1 + >> arch/arm/boot/dts/tegra20.dtsi | 8 -------- >> arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ >> arch/arm/boot/dts/tegra30-beaver.dts | 1 + >> arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 ++ >> arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +++ >> arch/arm/boot/dts/tegra30.dtsi | 8 -------- >> 23 files changed, 39 insertions(+), 30 deletions(-) > > I have applied this to the for-3.19/dt branch. Maybe I wasn't entirely clear -- I was proposing to include this in the next batch of fixes for 3.18 so that the aliases processing code can go in for 3.19. If we hold this until the merge window we run the risk of having largeish parts of the merge window unbisectable (more than if we merge this as part of the next/dt contents). > So for anything that is > post Tegra124 the new rule shall be to add aliases to the SoC .dtsi and > then use consistent numbering of UART ports across boards? > > The alternative is to remain consistent with what this patch does, which > would be to make the serial port numbering a property of the board. That > doesn't sound too bad to me either since it'll hide all the unused ports > on a given board. I was envisioning the former, but the latter would work OK too. -Olof
On 11/12/2014 05:20 AM, Thierry Reding wrote: > On Tue, Nov 11, 2014 at 12:49:30PM -0800, Olof Johansson wrote: >> There are general changes pending to make the /aliases/serial* entries >> number the serial ports on the system. On tegra, so far the ports have been >> just numbered dynamically as they are configured so that makes them change. >> >> To avoid this, add specific aliases per board to keep the old numbers. This >> allows us to change the numbering by default on future SoCs while keeping the >> numbering on existing boards. ... > I have applied this to the for-3.19/dt branch. So for anything that is > post Tegra124 the new rule shall be to add aliases to the SoC .dtsi and > then use consistent numbering of UART ports across boards? > > The alternative is to remain consistent with what this patch does, which > would be to make the serial port numbering a property of the board. That > doesn't sound too bad to me either since it'll hide all the unused ports > on a given board. For new SoCs, I think board-specific aliases would make most sense. That would be consistent with this patch. The only question I had was for existing SoCs, should we make the switch this patch does, or leave the aliases inactive there? New SoCs should use more sensible aliases.
On Wed, Nov 12, 2014 at 09:07:20AM -0800, Olof Johansson wrote: > Hi Thierry, > > > > On Wed, Nov 12, 2014 at 4:20 AM, Thierry Reding > <thierry.reding@gmail.com> wrote: > > On Tue, Nov 11, 2014 at 12:49:30PM -0800, Olof Johansson wrote: > >> There are general changes pending to make the /aliases/serial* entries > >> number the serial ports on the system. On tegra, so far the ports have been > >> just numbered dynamically as they are configured so that makes them change. > >> > >> To avoid this, add specific aliases per board to keep the old numbers. This > >> allows us to change the numbering by default on future SoCs while keeping the > >> numbering on existing boards. > >> > >> Signed-off-by: Olof Johansson <olof@lixom.net> > >> --- > >> > >> Stephen/Thierry/Alex, as noticed this week we really should try to get > >> this in before the 3.19 merge window so that the global aliases change > >> can happen there without regression. > >> > >> If you have more fixes queued up, feel free to add this to the next pull > >> request. If not, a review and ack would be appreciated. > >> > >> arch/arm/boot/dts/tegra114-dalmore.dts | 1 + > >> arch/arm/boot/dts/tegra114-roth.dts | 4 ++++ > >> arch/arm/boot/dts/tegra114-tn7.dts | 4 ++++ > >> arch/arm/boot/dts/tegra114.dtsi | 7 ------- > >> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 1 + > >> arch/arm/boot/dts/tegra124-nyan-big.dts | 1 + > >> arch/arm/boot/dts/tegra124-venice2.dts | 1 + > >> arch/arm/boot/dts/tegra124.dtsi | 7 ------- > >> arch/arm/boot/dts/tegra20-harmony.dts | 1 + > >> arch/arm/boot/dts/tegra20-iris-512.dts | 5 +++++ > >> arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ > >> arch/arm/boot/dts/tegra20-paz00.dts | 2 ++ > >> arch/arm/boot/dts/tegra20-seaboard.dts | 1 + > >> arch/arm/boot/dts/tegra20-tamonten.dtsi | 1 + > >> arch/arm/boot/dts/tegra20-trimslice.dts | 1 + > >> arch/arm/boot/dts/tegra20-ventana.dts | 1 + > >> arch/arm/boot/dts/tegra20-whistler.dts | 1 + > >> arch/arm/boot/dts/tegra20.dtsi | 8 -------- > >> arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ > >> arch/arm/boot/dts/tegra30-beaver.dts | 1 + > >> arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 ++ > >> arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +++ > >> arch/arm/boot/dts/tegra30.dtsi | 8 -------- > >> 23 files changed, 39 insertions(+), 30 deletions(-) > > > > I have applied this to the for-3.19/dt branch. > > Maybe I wasn't entirely clear -- I was proposing to include this in > the next batch of fixes for 3.18 so that the aliases processing code > can go in for 3.19. If we hold this until the merge window we run the > risk of having largeish parts of the merge window unbisectable (more > than if we merge this as part of the next/dt contents). Alex sent out two patches today that should go into 3.18, so let me prepare a pull request include those and your patch. Thierry
On Wed, Nov 12, 2014 at 11:14:40AM -0700, Stephen Warren wrote: > On 11/12/2014 05:20 AM, Thierry Reding wrote: > >On Tue, Nov 11, 2014 at 12:49:30PM -0800, Olof Johansson wrote: > >>There are general changes pending to make the /aliases/serial* entries > >>number the serial ports on the system. On tegra, so far the ports have been > >>just numbered dynamically as they are configured so that makes them change. > >> > >>To avoid this, add specific aliases per board to keep the old numbers. This > >>allows us to change the numbering by default on future SoCs while keeping the > >>numbering on existing boards. > ... > >I have applied this to the for-3.19/dt branch. So for anything that is > >post Tegra124 the new rule shall be to add aliases to the SoC .dtsi and > >then use consistent numbering of UART ports across boards? > > > >The alternative is to remain consistent with what this patch does, which > >would be to make the serial port numbering a property of the board. That > >doesn't sound too bad to me either since it'll hide all the unused ports > >on a given board. > > For new SoCs, I think board-specific aliases would make most sense. That > would be consistent with this patch. The only question I had was for > existing SoCs, should we make the switch this patch does, or leave the > aliases inactive there? New SoCs should use more sensible aliases. I can't think of a way to keep backwards compatibility. I mean once a patch is merged to apply aliases as specified in the DTB it'll change behaviour on older DTBs. The best we could achieve is to update DTBs with a flag to say that the aliases are to be ignored. But given that no such flag exists in old DTBs, ABI would still be broken. So I think it's fair to say that aliases have been buggy up to now and therefore relying on deterministic serial port naming is broken, too. Also there's precedent for this kind of thing. Ethernet device names have undergone similar changes and I think people have dealt with it just fine. Also since the aliases haven't been used up to now it isn't really the DT breaking ABI, but rather the kernel, and this patch actually fixes things up. I think the lesson to be learned from this is that it is a mistake to add DT content that isn't used. That said, I guess there is one way to preserve the existing naming after all. The driver could be patched to special-case Tegra20 through Tegra124 and ignore aliases there. But I suspect that there are other SoCs that have the same issue, so this is likely going to be a rather big table. Thierry
On Thu, Nov 13, 2014 at 12:27:07PM +0100, Thierry Reding wrote: > On Wed, Nov 12, 2014 at 09:07:20AM -0800, Olof Johansson wrote: > > Hi Thierry, > > > > > > > > On Wed, Nov 12, 2014 at 4:20 AM, Thierry Reding > > <thierry.reding@gmail.com> wrote: > > > On Tue, Nov 11, 2014 at 12:49:30PM -0800, Olof Johansson wrote: > > >> There are general changes pending to make the /aliases/serial* entries > > >> number the serial ports on the system. On tegra, so far the ports have been > > >> just numbered dynamically as they are configured so that makes them change. > > >> > > >> To avoid this, add specific aliases per board to keep the old numbers. This > > >> allows us to change the numbering by default on future SoCs while keeping the > > >> numbering on existing boards. > > >> > > >> Signed-off-by: Olof Johansson <olof@lixom.net> > > >> --- > > >> > > >> Stephen/Thierry/Alex, as noticed this week we really should try to get > > >> this in before the 3.19 merge window so that the global aliases change > > >> can happen there without regression. > > >> > > >> If you have more fixes queued up, feel free to add this to the next pull > > >> request. If not, a review and ack would be appreciated. > > >> > > >> arch/arm/boot/dts/tegra114-dalmore.dts | 1 + > > >> arch/arm/boot/dts/tegra114-roth.dts | 4 ++++ > > >> arch/arm/boot/dts/tegra114-tn7.dts | 4 ++++ > > >> arch/arm/boot/dts/tegra114.dtsi | 7 ------- > > >> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 1 + > > >> arch/arm/boot/dts/tegra124-nyan-big.dts | 1 + > > >> arch/arm/boot/dts/tegra124-venice2.dts | 1 + > > >> arch/arm/boot/dts/tegra124.dtsi | 7 ------- > > >> arch/arm/boot/dts/tegra20-harmony.dts | 1 + > > >> arch/arm/boot/dts/tegra20-iris-512.dts | 5 +++++ > > >> arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ > > >> arch/arm/boot/dts/tegra20-paz00.dts | 2 ++ > > >> arch/arm/boot/dts/tegra20-seaboard.dts | 1 + > > >> arch/arm/boot/dts/tegra20-tamonten.dtsi | 1 + > > >> arch/arm/boot/dts/tegra20-trimslice.dts | 1 + > > >> arch/arm/boot/dts/tegra20-ventana.dts | 1 + > > >> arch/arm/boot/dts/tegra20-whistler.dts | 1 + > > >> arch/arm/boot/dts/tegra20.dtsi | 8 -------- > > >> arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ > > >> arch/arm/boot/dts/tegra30-beaver.dts | 1 + > > >> arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 ++ > > >> arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +++ > > >> arch/arm/boot/dts/tegra30.dtsi | 8 -------- > > >> 23 files changed, 39 insertions(+), 30 deletions(-) > > > > > > I have applied this to the for-3.19/dt branch. > > > > Maybe I wasn't entirely clear -- I was proposing to include this in > > the next batch of fixes for 3.18 so that the aliases processing code > > can go in for 3.19. If we hold this until the merge window we run the > > risk of having largeish parts of the merge window unbisectable (more > > than if we merge this as part of the next/dt contents). > > Alex sent out two patches today that should go into 3.18, so let me > prepare a pull request include those and your patch. In addition to the three patches I had to pull in a partial version of Lucas' patch to add the DT labels on Tegra124 that your patch references in the aliases node. I've sent out a pull request, let me know if that doesn't match what you had expected. Thierry
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 5c21d21..8b7aa0d 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -15,6 +15,7 @@ aliases { rtc0 = "/i2c@7000d000/tps65913@58"; rtc1 = "/rtc@7000e000"; + serial0 = &uartd; }; memory { diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts index c7c6825..a80f1e2 100644 --- a/arch/arm/boot/dts/tegra114-roth.dts +++ b/arch/arm/boot/dts/tegra114-roth.dts @@ -15,6 +15,10 @@ linux,initrd-end = <0x82800000>; }; + aliases { + serial0 = &uartd; + }; + firmware { trusted-foundations { compatible = "tlm,trusted-foundations"; diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts index 9636621..2301c66 100644 --- a/arch/arm/boot/dts/tegra114-tn7.dts +++ b/arch/arm/boot/dts/tegra114-tn7.dts @@ -15,6 +15,10 @@ linux,initrd-end = <0x82800000>; }; + aliases { + serial0 = &uartd; + }; + firmware { trusted-foundations { compatible = "tlm,trusted-foundations"; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 2ca9c18..222f3b3 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -9,13 +9,6 @@ compatible = "nvidia,tegra114"; interrupt-parent = <&gic>; - aliases { - serial0 = &uarta; - serial1 = &uartb; - serial2 = &uartc; - serial3 = &uartd; - }; - host1x@50000000 { compatible = "nvidia,tegra114-host1x", "simple-bus"; reg = <0x50000000 0x00028000>; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index f46a789..4eb540b 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@0,7000d000/pmic@40"; rtc1 = "/rtc@0,7000e000"; + serial0 = &uartd; }; memory { diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts index 7d0784c..53181d3 100644 --- a/arch/arm/boot/dts/tegra124-nyan-big.dts +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@0,7000d000/pmic@40"; rtc1 = "/rtc@0,7000e000"; + serial0 = &uarta; }; memory { diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 1300885..5c3f781 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@0,7000d000/pmic@40"; rtc1 = "/rtc@0,7000e000"; + serial0 = &uarta; }; memory { diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index f765110..dde226e 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -13,13 +13,6 @@ #address-cells = <2>; #size-cells = <2>; - aliases { - serial0 = &uarta; - serial1 = &uartb; - serial2 = &uartc; - serial3 = &uartd; - }; - pcie-controller@0,01003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index a37279a..b926a07 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; + serial0 = &uartd; }; memory { diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts index 8cfb83f..1dd7d7b 100644 --- a/arch/arm/boot/dts/tegra20-iris-512.dts +++ b/arch/arm/boot/dts/tegra20-iris-512.dts @@ -6,6 +6,11 @@ model = "Toradex Colibri T20 512MB on Iris"; compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20"; + aliases { + serial0 = &uarta; + serial1 = &uartd; + }; + host1x@50000000 { hdmi@54280000 { status = "okay"; diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts index 1b7c56b..9b87526 100644 --- a/arch/arm/boot/dts/tegra20-medcom-wide.dts +++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts @@ -6,6 +6,10 @@ model = "Avionic Design Medcom-Wide board"; compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20"; + aliases { + serial0 = &uartd; + }; + pwm@7000a000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index d4438e3..ed7e100 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -10,6 +10,8 @@ aliases { rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; + serial0 = &uarta; + serial1 = &uartc; }; memory { diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index a1d4bf9..ea282c7 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; + serial0 = &uartd; }; memory { diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 80e7d38..13d4e61 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -7,6 +7,7 @@ aliases { rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; + serial0 = &uartd; }; memory { diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 5ad8797..d99af4e 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@7000c500/rtc@56"; rtc1 = "/rtc@7000e000"; + serial0 = &uarta; }; memory { diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index ca8484c..04c58e9 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; + serial0 = &uartd; }; memory { diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index 1843725..340d811 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts @@ -10,6 +10,7 @@ aliases { rtc0 = "/i2c@7000d000/max8907@3c"; rtc1 = "/rtc@7000e000"; + serial0 = &uarta; }; memory { diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 3b374c4..8acf5d8 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -9,14 +9,6 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&intc>; - aliases { - serial0 = &uarta; - serial1 = &uartb; - serial2 = &uartc; - serial3 = &uartd; - serial4 = &uarte; - }; - host1x@50000000 { compatible = "nvidia,tegra20-host1x", "simple-bus"; reg = <0x50000000 0x00024000>; diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 45d40f0..6236bde 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -11,6 +11,10 @@ rtc0 = "/i2c@7000c000/rtc@68"; rtc1 = "/i2c@7000d000/tps65911@2d"; rtc2 = "/rtc@7000e000"; + serial0 = &uarta; + serial1 = &uartb; + serial2 = &uartc; + serial3 = &uartd; }; pcie-controller@00003000 { diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index cee8f22..6b157ee 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -9,6 +9,7 @@ aliases { rtc0 = "/i2c@7000d000/tps65911@2d"; rtc1 = "/rtc@7000e000"; + serial0 = &uarta; }; memory { diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 2063795..a1b682e 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -30,6 +30,8 @@ aliases { rtc0 = "/i2c@7000d000/tps65911@2d"; rtc1 = "/rtc@7000e000"; + serial0 = &uarta; + serial1 = &uartc; }; memory { diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 7793abd..4d3ddc5 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -10,6 +10,9 @@ rtc0 = "/i2c@7000c000/rtc@68"; rtc1 = "/i2c@7000d000/tps65911@2d"; rtc2 = "/rtc@7000e000"; + serial0 = &uarta; + serial1 = &uartb; + serial2 = &uartd; }; host1x@50000000 { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index aa6ccea..b270b9e 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -9,14 +9,6 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; - aliases { - serial0 = &uarta; - serial1 = &uartb; - serial2 = &uartc; - serial3 = &uartd; - serial4 = &uarte; - }; - pcie-controller@00003000 { compatible = "nvidia,tegra30-pcie"; device_type = "pci";
There are general changes pending to make the /aliases/serial* entries number the serial ports on the system. On tegra, so far the ports have been just numbered dynamically as they are configured so that makes them change. To avoid this, add specific aliases per board to keep the old numbers. This allows us to change the numbering by default on future SoCs while keeping the numbering on existing boards. Signed-off-by: Olof Johansson <olof@lixom.net> --- Stephen/Thierry/Alex, as noticed this week we really should try to get this in before the 3.19 merge window so that the global aliases change can happen there without regression. If you have more fixes queued up, feel free to add this to the next pull request. If not, a review and ack would be appreciated. arch/arm/boot/dts/tegra114-dalmore.dts | 1 + arch/arm/boot/dts/tegra114-roth.dts | 4 ++++ arch/arm/boot/dts/tegra114-tn7.dts | 4 ++++ arch/arm/boot/dts/tegra114.dtsi | 7 ------- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 1 + arch/arm/boot/dts/tegra124-nyan-big.dts | 1 + arch/arm/boot/dts/tegra124-venice2.dts | 1 + arch/arm/boot/dts/tegra124.dtsi | 7 ------- arch/arm/boot/dts/tegra20-harmony.dts | 1 + arch/arm/boot/dts/tegra20-iris-512.dts | 5 +++++ arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ arch/arm/boot/dts/tegra20-paz00.dts | 2 ++ arch/arm/boot/dts/tegra20-seaboard.dts | 1 + arch/arm/boot/dts/tegra20-tamonten.dtsi | 1 + arch/arm/boot/dts/tegra20-trimslice.dts | 1 + arch/arm/boot/dts/tegra20-ventana.dts | 1 + arch/arm/boot/dts/tegra20-whistler.dts | 1 + arch/arm/boot/dts/tegra20.dtsi | 8 -------- arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ arch/arm/boot/dts/tegra30-beaver.dts | 1 + arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 ++ arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +++ arch/arm/boot/dts/tegra30.dtsi | 8 -------- 23 files changed, 39 insertions(+), 30 deletions(-)