From patchwork Thu Nov 27 10:57:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 5394861 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7E458C11AC for ; Thu, 27 Nov 2014 11:00:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BED042013D for ; Thu, 27 Nov 2014 11:00:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D92712013A for ; Thu, 27 Nov 2014 11:00:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xtwlm-000612-Rc; Thu, 27 Nov 2014 10:57:54 +0000 Received: from michel.telenet-ops.be ([195.130.137.88]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xtwlh-0005qy-9F for linux-arm-kernel@lists.infradead.org; Thu, 27 Nov 2014 10:57:50 +0000 Received: from ayla.of.borg ([84.193.84.167]) by michel.telenet-ops.be with bizsmtp id LaxK1p00H3cczKo06axKoF; Thu, 27 Nov 2014 11:57:23 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1XtwlD-0006QQ-Gd; Thu, 27 Nov 2014 11:57:19 +0100 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1XtwlE-0005x6-Lu; Thu, 27 Nov 2014 11:57:20 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm , Marc Zyngier , Rob Herring Subject: [PATCH 2/4] ARM: shmobile: r8a7794: Correct mask for GIC PPI interrupts Date: Thu, 27 Nov 2014 11:57:17 +0100 Message-Id: <1417085839-22836-3-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1417085839-22836-1-git-send-email-geert+renesas@glider.be> References: <1417085839-22836-1-git-send-email-geert+renesas@glider.be> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141127_025749_830994_E9A4BCC8 X-CRM114-Status: UNSURE ( 8.03 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-sh@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP R-Car E2 (r8a7794) contains two Cortex-A7 cores, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(2)". Signed-off-by: Geert Uytterhoeven --- Untested --- arch/arm/boot/dts/r8a7794.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 19c9de3f2a5ade33..0a6caa99e3afb07e 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -47,7 +47,7 @@ <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; }; cmt0: timer@ffca0000 { @@ -84,10 +84,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; irqc0: interrupt-controller@e61c0000 {