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+Mediatek MT8135 Clock Controller
+
+This binding uses the common clock binding:
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The Mediatek MT8135 clock controller generates and supplies clock to various
+controllers within Mediatek MT8135 SoC.
+
+Required Properties:
+
+- compatible: should be one of following:
+ - "mediatek,mt8135-topckgen" : for topckgen clock controller of MT8135.
+ - "mediatek,mt8135-apmixedsys" : for apmixed_sys (PLLs) of MT8135.
+ - "mediatek,mt8135-infracfg" : for infra_sys clock controller of MT8135.
+ - "mediatek,mt8135-pericfg" : for peri_sys clock controller of MT8135.
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/mt8135-clk.h header and can be used in device tree sources.
+
+Example: I2C controller node that consumes the clock generated by the clock
+ controller (refer to the standard clock bindings for information about
+ "clocks" and "clock-names" properties):
+
+ i2c0: i2c@1100d000 {
+ compatible = "mediatek,mt8135-i2c", "mediatek,mt6589-i2c";
+ reg = <0 0x1100d000 0 0x70>, <0 0x11000300 0 0x80>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <16>;
+ clocks = <&pericfg PERI_I2C0_CK>, <&pericfg PERI_AP_DMA_CK>;
+ clock-names = "main", "dma";
+ };
Document the device-tree binding of Mediatek MT8135 SoC, including TOPCKGEN, PLLs, INFRA and PERI clock controller. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> --- .../bindings/clock/mediatek,mt8135-clock.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8135-clock.txt