From patchwork Mon Dec 1 21:51:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hauke Mehrtens X-Patchwork-Id: 5415541 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5F7E7BEEA8 for ; Mon, 1 Dec 2014 21:54:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 85A0520266 for ; Mon, 1 Dec 2014 21:54:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 89A7B20260 for ; Mon, 1 Dec 2014 21:54:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XvYsj-0000Rv-IC; Mon, 01 Dec 2014 21:51:45 +0000 Received: from hauke-m.de ([5.39.93.123]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XvYsg-0000IH-Sd for linux-arm-kernel@lists.infradead.org; Mon, 01 Dec 2014 21:51:43 +0000 Received: from hauke-desktop.lan (spit-414.wohnheim.uni-bremen.de [134.102.133.158]) by hauke-m.de (Postfix) with ESMTPSA id 5ED8D20114; Mon, 1 Dec 2014 22:51:19 +0100 (CET) From: Hauke Mehrtens To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file Date: Mon, 1 Dec 2014 22:51:07 +0100 Message-Id: <1417470667-15679-1-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141201_135143_069105_B2A97671 X-CRM114-Status: UNSURE ( 9.20 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, zajec5@gmail.com, f.fainelli@gmail.com, arnd@arndb.de, Hauke Mehrtens X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP IRQ support for Broadcom's bus-axi driver bcma was merged into John Linville's wireless tree and will show up in 3.19. This patch makes use of this feature in the DTS file for the the BCM5301X SoCs. I left the PCIe controller out, because this still needs some discussion. Signed-off-by: Hauke Mehrtens Acked-by: Arnd Bergmann --- arch/arm/boot/dts/bcm5301x.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index 6d80922..b7c4e9e 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -101,6 +101,40 @@ #address-cells = <1>; #size-cells = <1>; + #interrupt-cells = <1>; + interrupt-map-mask = <0x000fffff 0xffff>; + interrupt-map = + /* ChipCommon */ + <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + + /* USB 2.0 Controller */ + <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, + + /* USB 3.0 Controller */ + <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, + + /* Ethernet Controller 0 */ + <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, + + /* Ethernet Controller 1 */ + <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, + + /* Ethernet Controller 2 */ + <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, + + /* Ethernet Controller 3 */ + <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, + + /* NAND Controller */ + <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + chipcommon: chipcommon@0 { reg = <0x00000000 0x1000>;