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Thu, 18 Dec 2014 00:08:04 -0700 From: Liu Ying To: Subject: [PATCH RFC v2 08/14] drm: imx: Add MIPI DSI host controller driver Date: Thu, 18 Dec 2014 15:11:30 +0800 Message-ID: <1418886696-11636-9-git-send-email-Ying.Liu@freescale.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1418886696-11636-1-git-send-email-Ying.Liu@freescale.com> References: <1418886696-11636-1-git-send-email-Ying.Liu@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Ying.Liu@freescale.com; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(479174004)(199003)(189002)(19580395003)(50226001)(89996001)(68736005)(50986999)(6806004)(87936001)(31966008)(575784001)(84676001)(2950100001)(120916001)(85426001)(86362001)(76176999)(106466001)(97736003)(104016003)(105606002)(64706001)(62966003)(110136001)(50466002)(4396001)(99396003)(46102003)(77096005)(229853001)(36756003)(48376002)(21056001)(107046002)(2351001)(92566001)(20776003)(19580405001)(47776003)(77156002)(2004002)(217873001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR0301MB0627; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BN1PR0301MB0627; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:BN1PR0301MB0627; X-Forefront-PRVS: 042957ACD7 X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:BN1PR0301MB0627; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141217_230832_897064_AF8CCF3A X-CRM114-Status: GOOD ( 17.67 ) X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, linux@arm.linux.org.uk, kernel@pengutronix.de, airlied@linux.ie, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, p.zabel@pengutronix.de, mturquette@linaro.org, shawn.guo@linaro.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds i.MX MIPI DSI host controller driver support. Currently, the driver supports the burst with sync pulses mode only. Signed-off-by: Liu Ying --- v1->v2: * Address almost all comments from Thierry Reding and Russell. * Update the DT documentation to remove the display-timings node in the panel node. * Update the DT documentation to state that the nodes which represent the possible DRM CRTCs the controller may connect with should be placed in the node "ports". * Remove the flag 'enabled' from the struct imx_mipi_dsi. * Move the format_to_bpp() function in v1 to the common DRM MIPI DSI driver. * Improve the way we wait for check status for DPHY and command packet transfer. * Improve the DPMS support for the encoder. * Split the functions of ->host_attach() and ->mode_valid() clearly as suggested by Thierry Reding. * Improve the logics in imx_mipi_dsi_dcs_long_write(). * Enable/disable the pllref_clk and pllref_gate_clk at the component binding/unbinding stages to help remove the flag 'enabled'. * Update the module license to be "GPL". * Other minor changes, such as coding style issues and macro naming issues. .../devicetree/bindings/drm/imx/mipi_dsi.txt | 78 ++ drivers/gpu/drm/imx/Kconfig | 6 + drivers/gpu/drm/imx/Makefile | 1 + drivers/gpu/drm/imx/imx-mipi-dsi.c | 1056 ++++++++++++++++++++ 4 files changed, 1141 insertions(+) create mode 100644 Documentation/devicetree/bindings/drm/imx/mipi_dsi.txt create mode 100644 drivers/gpu/drm/imx/imx-mipi-dsi.c diff --git a/Documentation/devicetree/bindings/drm/imx/mipi_dsi.txt b/Documentation/devicetree/bindings/drm/imx/mipi_dsi.txt new file mode 100644 index 0000000..892ed62 --- /dev/null +++ b/Documentation/devicetree/bindings/drm/imx/mipi_dsi.txt @@ -0,0 +1,78 @@ +Device-Tree bindings for MIPI DSI host controller + +MIPI DSI host controller +======================== + +The MIPI DSI host controller is a Synopsys DesignWare IP. +It is a digital core that implements all protocol functions defined +in the MIPI DSI specification, providing an interface between the +system and the MIPI DPHY, and allowing communication with a MIPI DSI +compliant display. + +Required properties: + - #address-cells: Should be <1>. + - #size-cells: Should be <0>. + - compatible: Should be "fsl,imx6q-mipi-dsi" for i.MX6q/sdl SoCs. + - reg: Physical base address of the controller and length of memory + mapped region. + - interrupts: The controller's interrupt number to the CPU(s). + - gpr: Should be <&gpr>. + The phandle points to the iomuxc-gpr region containing the + multiplexer control register for the controller. + - clocks, clock-names: Phandles to the controller pllref, pllref_gate + and core_cfg clocks, as described in [1] and [2]. + +Required sub-nodes: + - ports: This node may contain up to four port nodes with endpoint + definitions as defined in [3], corresponding to the four inputs to + the controller multiplexer. + - A node to represent a DSI peripheral as described in [4]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/clock/imx6q-clock.txt +[3] Documentation/devicetree/bindings/media/video-interfaces.txt +[4] Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt + +example: + gpr: iomuxc-gpr@020e0000 { + /* ... */ + }; + + mipi_dsi: mipi@021e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx6q-mipi-dsi"; + reg = <0x021e0000 0x4000>; + interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; + gpr = <&gpr>; + clocks = <&clks IMX6QDL_CLK_VIDEO_27M>, + <&clks IMX6QDL_CLK_HSI_TX>, + <&clks IMX6QDL_CLK_HSI_TX>; + clock-names = "pllref", "pllref_gate", "core_cfg"; + + ports { + port@0 { + reg = <0>; + input-port; + + mipi_mux_0: endpoint { + remote-endpoint = <&ipu1_di0_mipi>; + }; + }; + + port@1 { + reg = <1>; + input-port; + + mipi_mux_1: endpoint { + remote-endpoint = <&ipu1_di1_mipi>; + }; + }; + }; + + panel { + compatible = "truly,tft480800-16-e-dsi"; + reg = <0>; + /* ... */ + }; + }; diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig index 82fb758..03f04fb 100644 --- a/drivers/gpu/drm/imx/Kconfig +++ b/drivers/gpu/drm/imx/Kconfig @@ -51,3 +51,9 @@ config DRM_IMX_HDMI depends on DRM_IMX help Choose this if you want to use HDMI on i.MX6. + +config DRM_IMX_MIPI_DSI + tristate "Freescale i.MX DRM MIPI DSI" + depends on DRM_IMX && MFD_SYSCON + help + Choose this if you want to use MIPI DSI on i.MX6. diff --git a/drivers/gpu/drm/imx/Makefile b/drivers/gpu/drm/imx/Makefile index 582c438..4571d52 100644 --- a/drivers/gpu/drm/imx/Makefile +++ b/drivers/gpu/drm/imx/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o imx-ipuv3-crtc-objs := ipuv3-crtc.o ipuv3-plane.o obj-$(CONFIG_DRM_IMX_IPUV3) += imx-ipuv3-crtc.o obj-$(CONFIG_DRM_IMX_HDMI) += imx-hdmi.o +obj-$(CONFIG_DRM_IMX_MIPI_DSI) += imx-mipi-dsi.o diff --git a/drivers/gpu/drm/imx/imx-mipi-dsi.c b/drivers/gpu/drm/imx/imx-mipi-dsi.c new file mode 100644 index 0000000..1cb4328 --- /dev/null +++ b/drivers/gpu/drm/imx/imx-mipi-dsi.c @@ -0,0 +1,1056 @@ +/* + * i.MX drm driver - MIPI DSI Host Controller + * + * Copyright (C) 2011-2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include