From patchwork Tue Dec 23 10:02:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Ying X-Patchwork-Id: 5532061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A1DFF9F30B for ; Tue, 23 Dec 2014 10:08:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BB6392017D for ; Tue, 23 Dec 2014 10:08:11 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E1EC6200F0 for ; Tue, 23 Dec 2014 10:08:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y3MKi-0006ww-DJ; Tue, 23 Dec 2014 10:04:52 +0000 Received: from mail-by2on0109.outbound.protection.outlook.com ([207.46.100.109] helo=na01-by2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y3MFN-0001u1-WA for linux-arm-kernel@lists.infradead.org; Tue, 23 Dec 2014 09:59:22 +0000 Received: from BN3PR0301CA0067.namprd03.prod.outlook.com (25.160.152.163) by BN1PR0301MB0625.namprd03.prod.outlook.com (25.160.170.28) with Microsoft SMTP Server (TLS) id 15.1.49.12; Tue, 23 Dec 2014 09:58:57 +0000 Received: from BN1BFFO11FD009.protection.gbl (2a01:111:f400:7c10::1:129) by BN3PR0301CA0067.outlook.office365.com (2a01:111:e400:401e::35) with Microsoft SMTP Server (TLS) id 15.1.49.12 via Frontend Transport; Tue, 23 Dec 2014 09:58:57 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1BFFO11FD009.mail.protection.outlook.com (10.58.144.72) with Microsoft SMTP Server (TLS) id 15.1.49.13 via Frontend Transport; Tue, 23 Dec 2014 09:58:57 +0000 Received: from victor.ap.freescale.net (victor.ap.freescale.net [10.192.241.62]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id sBN9w2Fe000700; Tue, 23 Dec 2014 02:58:53 -0700 From: Liu Ying To: Subject: [PATCH RFC v4 11/21] Documentation: dt-bindings: Add bindings for Synopsys DW MIPI DSI DRM bridge driver Date: Tue, 23 Dec 2014 18:02:09 +0800 Message-ID: <1419328939-22758-12-git-send-email-Ying.Liu@freescale.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1419328939-22758-1-git-send-email-Ying.Liu@freescale.com> References: <1419328939-22758-1-git-send-email-Ying.Liu@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Ying.Liu@freescale.com; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(189002)(199003)(99396003)(2351001)(107046002)(2950100001)(85426001)(87936001)(89996001)(31966008)(21056001)(36756003)(106466001)(62966003)(97736003)(110136001)(105606002)(86362001)(50986999)(77156002)(229853001)(4396001)(77096005)(68736005)(120916001)(46102003)(50226001)(19580395003)(19580405001)(50466002)(92566001)(6806004)(76176999)(20776003)(84676001)(47776003)(64706001)(48376002)(104016003)(217873001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR0301MB0625; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BN1PR0301MB0625; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:BN1PR0301MB0625; X-Forefront-PRVS: 04347F8039 X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:BN1PR0301MB0625; X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Dec 2014 09:58:57.1365 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR0301MB0625 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141223_015922_149985_2E477F4F X-CRM114-Status: UNSURE ( 9.81 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.3 (/) Cc: stefan.wahren@i2se.com, devicetree@vger.kernel.org, linux@arm.linux.org.uk, kernel@pengutronix.de, airlied@linux.ie, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, p.zabel@pengutronix.de, mturquette@linaro.org, shawn.guo@linaro.org, linux-arm-kernel@lists.infradead.org, andyshrk@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds device tree bindings for Synopsys DesignWare MIPI DSI host controller DRM bridge driver. Signed-off-by: Liu Ying --- v3->v4: * Newly introduced in v4. This is separated from the relevant driver patch in v3 to address Stefan Wahren's comment. .../devicetree/bindings/drm/bridge/dw_mipi_dsi.txt | 72 ++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt b/Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt new file mode 100644 index 0000000..5dcbd9f --- /dev/null +++ b/Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt @@ -0,0 +1,72 @@ +Device-Tree bindings for Synopsys DesignWare MIPI DSI host controller + +The controller is a digital core that implements all protocol functions +defined in the MIPI DSI specification, providing an interface between +the system and the MIPI DPHY, and allowing communication with a MIPI DSI +compliant display. + +Required properties: + - #address-cells: Should be <1>. + - #size-cells: Should be <0>. + - compatible: The compatible string should be "fsl,imx6q-mipi-dsi" for + i.MX6q/sdl SoCs. For other SoCs, please refer to their specific + device tree binding documentations. + - reg: Represent the physical address range of the controller. + - interrupts: Represent the controller's interrupt to the CPU(s). + - clocks, clock-names: Phandles to the controller pll reference and + core configuration clocks, as described in [1]. + +For more required properties, please refer to relevant device tree binding +documentations which describe the controller embedded in specific SoCs. + +Required sub-nodes: + - A node to represent a DSI peripheral as described in [2]. + +For more required sub-nodes, please refer to relevant device tree binding +documentations which describe the controller embedded in specific SoCs. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt + +example: + gpr: iomuxc-gpr@020e0000 { + /* ... */ + }; + + mipi_dsi: mipi@021e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx6q-mipi-dsi"; + reg = <0x021e0000 0x4000>; + interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; + gpr = <&gpr>; + clocks = <&clks IMX6QDL_CLK_MIPI_CORE_CFG>, + <&clks IMX6QDL_CLK_MIPI_CORE_CFG>; + clock-names = "pllref", "core_cfg"; + + ports { + port@0 { + reg = <0>; + input-port; + + mipi_mux_0: endpoint { + remote-endpoint = <&ipu1_di0_mipi>; + }; + }; + + port@1 { + reg = <1>; + input-port; + + mipi_mux_1: endpoint { + remote-endpoint = <&ipu1_di1_mipi>; + }; + }; + }; + + panel { + compatible = "truly,tft480800-16-e-dsi"; + reg = <0>; + /* ... */ + }; + };