From patchwork Fri Dec 26 09:05:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Flora Fu X-Patchwork-Id: 5542611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 847B6BEEA8 for ; Fri, 26 Dec 2014 09:09:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C994201C7 for ; Fri, 26 Dec 2014 09:09:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D04CD20173 for ; Fri, 26 Dec 2014 09:09:21 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y4Qs1-0004Fb-Oo; Fri, 26 Dec 2014 09:07:41 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y4QrQ-0003n1-9p for linux-arm-kernel@lists.infradead.org; Fri, 26 Dec 2014 09:07:05 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1542913782; Fri, 26 Dec 2014 17:06:38 +0800 Received: from mtksdtcf04.mediatek.inc (10.21.12.144) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Fri, 26 Dec 2014 17:06:37 +0800 From: Flora Fu To: Philipp Zabel , Rob Herring , Matthias Brugger Subject: [PATCH v4 2/3] dt-bindings: Add Reset Controller for MediaTek SoC Date: Fri, 26 Dec 2014 17:05:50 +0800 Message-ID: <1419584751-18149-3-git-send-email-flora.fu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1419584751-18149-1-git-send-email-flora.fu@mediatek.com> References: <1419584751-18149-1-git-send-email-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141226_010704_671015_D0B22CBA X-CRM114-Status: UNSURE ( 9.63 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.3 (+) Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , srv_heupstream@mediatek.com, Pawel Moll , Ian Campbell , Chen Zhong , linux-kernel@vger.kernel.org, HenryC Chen , Menghui Lin , Olof Johansson , Arnd Bergmann , Sascha Hauer , Kumar Gala , Grant Likely , Yingjoe Chen , Eddie Huang , Flora Fu , linux-arm-kernel@lists.infradead.org, Dongdong Cheng X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device tree bindings. Acked-by: Philipp Zabel Signed-off-by: Flora Fu --- .../devicetree/bindings/reset/mediatek,reset.txt | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/mediatek,reset.txt diff --git a/Documentation/devicetree/bindings/reset/mediatek,reset.txt b/Documentation/devicetree/bindings/reset/mediatek,reset.txt new file mode 100644 index 0000000..647b401 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/mediatek,reset.txt @@ -0,0 +1,52 @@ +MediaTek SoC Reset Controller +====================================== +The reset controller driver accesses registers through the syscon regmap. It +is a child node of syscon. + +Required properties: +- compatible : "mediatek,reset" +- #reset-cells: 1 +- reg: The register region can be accessed from syscon. The first parameter is + reset base address offset. The second parameter is byte width of reset registers. + +example: +infracfg: syscon@10001000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mediatek,mt8135-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + + infrarst: reset-controller@30 { + #reset-cells = <1>; + compatible = "mediatek,mt8135-infracfg-reset", "mediatek,reset"; + reg = <0x30 0x8>; + }; +}; + +Specifying reset lines connected to IP modules +============================================== + +The reset controller(mtk-reset) manages various reset sources. Those device nodes should +specify the reset line on the rstc in their resets property, containing a phandle to the +rstc device node and a RESET_INDEX specifying which module to reset, as described in +reset.txt. + +For MediaTek SoC, RESET_INDEX is reset bit defined in INFRACFG or PERICFG registers. + +example: +pwrap: pwrap@1000f000 { + compatible = "mediatek,mt8135-pwrap"; + reg = <0 0x1000f000 0 0x1000>, + <0 0x11017000 0 0x1000>; + reg-names = "pwrap-base", + "pwrap-bridge-base"; + resets = <&infrarst MT8135_INFRA_PMIC_WRAP_RST>, + <&perirst MT8135_PERI_PWRAP_BRIDGE_SW_RST>; + reset-names = "infrarst", "perirst"; +}; + +Definitions for the supported resets by IC: +MT8135: +include/dt-bindings/reset-controller/mt8135-resets.h +MT8173: +include/dt-bindings/reset-controller/mt8173-resets.h