diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 0014c34..df33f4f 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -312,6 +312,100 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
     }
 }
 
+static int arm_generate_memory_dtb(void *fdt, const struct arm_boot_info *binfo,
+                        uint32_t acells, uint32_t scells)
+{
+    CPUState *cpu;
+    int min_cpu = 0, max_cpu = 0;
+    int i = 0, j = 0, k = 0, len = 20;
+    int size = 6;
+    int size_mem = nb_numa_nodes * size;
+    int size_matrix = nb_numa_nodes * size_mem;
+
+    if (!nb_numa_nodes) {
+        qemu_fdt_add_subnode(fdt, "/memory");
+        qemu_fdt_setprop_string(fdt, "/memory", "device_type", "memory");
+        return qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
+                                      acells, binfo->loader_start,
+                                      scells, binfo->ram_size);
+    }
+
+    struct {
+        uint64_t mem_map[size_mem];
+        uint64_t cpu_map[size_mem];
+        uint64_t node_matrix[size_matrix];
+    } numa_map;
+
+    hwaddr mem_base = binfo->loader_start;
+
+    qemu_fdt_add_subnode(fdt, "/numa-map");
+    qemu_fdt_setprop_cell(fdt, "/numa-map", "#address-cells", 0x2);
+    qemu_fdt_setprop_cell(fdt, "/numa-map", "#size-cells", 0x1);
+    qemu_fdt_setprop_cell(fdt, "/numa-map", "#node-count", 0x2);
+
+    for (i = 0; i < nb_numa_nodes; i++) {
+        /* Generate mem_map */
+        char *nodename;
+        nodename = g_strdup_printf("/memory@%" PRIx64, mem_base);
+        qemu_fdt_add_subnode(fdt, nodename);
+        qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
+        qemu_fdt_setprop_sized_cells(fdt, nodename, "reg",
+                                  acells, mem_base,
+                                  scells, numa_info[i].node_mem - 1);
+        numa_map.mem_map[0 + size * i] = 1;
+        numa_map.mem_map[1 + size * i] = 0x0;
+        numa_map.mem_map[2 + size * i] = 1;
+        numa_map.mem_map[3 + size * i] = mem_base;
+        numa_map.mem_map[4 + size * i] = 1;
+        numa_map.mem_map[5 + size * i] = i;
+
+        mem_base += numa_info[i].node_mem;
+        g_free(nodename);
+
+        /* Generate cpu_map */
+        CPU_FOREACH(cpu) {
+            if (test_bit(cpu->cpu_index, numa_info[i].node_cpu)) {
+                if (cpu->cpu_index < min_cpu) {
+                    min_cpu = cpu->cpu_index;
+                }
+                if (cpu->cpu_index > max_cpu) {
+                    max_cpu = cpu->cpu_index;
+                }
+            }
+        }
+
+        numa_map.cpu_map[0 + size * i] = 1;
+        numa_map.cpu_map[1 + size * i] = min_cpu;
+        numa_map.cpu_map[2 + size * i] = 1;
+        numa_map.cpu_map[3 + size * i] = max_cpu;
+        numa_map.cpu_map[4 + size * i] = 1;
+        numa_map.cpu_map[5 + size * i] = i;
+        min_cpu = max_cpu + 1;
+
+        /* Generate node_matrix */
+        for (j = 0; j < nb_numa_nodes; j++) {
+            len = (i == j) ? 10 : 20;
+
+            numa_map.node_matrix[0 + size * k] = 1;
+            numa_map.node_matrix[1 + size * k] = i;
+            numa_map.node_matrix[2 + size * k] = 1;
+            numa_map.node_matrix[3 + size * k] = j;
+            numa_map.node_matrix[4 + size * k] = 1;
+            numa_map.node_matrix[5 + size * k] = len;
+            k++;
+        }
+    }
+
+    qemu_fdt_setprop_sized_cells_from_array(fdt, "/numa-map", "mem-map",
+                        size_mem / 2, numa_map.mem_map);
+    qemu_fdt_setprop_sized_cells_from_array(fdt, "/numa-map", "cpu-map",
+                        size_mem / 2, numa_map.cpu_map);
+    qemu_fdt_setprop_sized_cells_from_array(fdt, "/numa-map", "node-matrix",
+                        size_matrix / 2, numa_map.node_matrix);
+
+    return 0;
+}
+
 /**
  * load_dtb() - load a device tree binary image into memory
  * @addr:       the address to load the image at
@@ -385,9 +479,7 @@ static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
         goto fail;
     }
 
-    rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
-                                      acells, binfo->loader_start,
-                                      scells, binfo->ram_size);
+    rc = arm_generate_memory_dtb(fdt, binfo, acells, scells);
     if (rc < 0) {
         fprintf(stderr, "couldn't set /memory/reg\n");
         goto fail;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 314e55b..7feddaf 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -170,8 +170,6 @@ static void create_fdt(VirtBoardInfo *vbi)
      * to fill in necessary properties later
      */
     qemu_fdt_add_subnode(fdt, "/chosen");
-    qemu_fdt_add_subnode(fdt, "/memory");
-    qemu_fdt_setprop_string(fdt, "/memory", "device_type", "memory");
 
     /* Clock node, for the benefit of the UART. The kernel device tree
      * binding documentation claims the PL011 node clock properties are
@@ -585,9 +583,8 @@ static void machvirt_init(MachineState *machine)
     fdt_add_cpu_nodes(vbi);
     fdt_add_psci_node(vbi);
 
-    memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size,
-                           &error_abort);
-    vmstate_register_ram_global(ram);
+    memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram",
+                                         machine->ram_size);
     memory_region_add_subregion(sysmem, vbi->memmap[VIRT_MEM].base, ram);
 
     create_flash(vbi);
