From patchwork Mon Jan 12 07:05:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Wang X-Patchwork-Id: 5608331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 67FE7C058E for ; Mon, 12 Jan 2015 07:07:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8EE402063A for ; Mon, 12 Jan 2015 07:07:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9B27020605 for ; Mon, 12 Jan 2015 07:07:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YAZ3u-0007SU-BD; Mon, 12 Jan 2015 07:05:18 +0000 Received: from szxga01-in.huawei.com ([119.145.14.64]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YAZ3e-0005ar-Tm for linux-arm-kernel@lists.infradead.org; Mon, 12 Jan 2015 07:05:04 +0000 Received: from 172.24.2.119 (EHLO szxeml451-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CHM67912; Mon, 12 Jan 2015 15:04:05 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by szxeml451-hub.china.huawei.com (10.82.67.194) with Microsoft SMTP Server id 14.3.158.1; Mon, 12 Jan 2015 15:03:53 +0800 From: Zhou Wang To: Haojian Zhuang , Wei Xu , Linus Walleij , Alexandre Courbot , Arnd Bergmann , Olof Johansson , Russell King Subject: [PATCH v6 2/2] ARM: dts: hip04: add GPIO pieces Date: Mon, 12 Jan 2015 15:05:12 +0800 Message-ID: <1421046312-22170-3-git-send-email-wangzhou1@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1421046312-22170-1-git-send-email-wangzhou1@hisilicon.com> References: <1421046312-22170-1-git-send-email-wangzhou1@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150111_230503_675006_94DFC172 X-CRM114-Status: UNSURE ( 8.11 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: linux-gpio@vger.kernel.org, Zhou Wang , liguozhu@hisilicon.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hisilicon Soc hip04 has four GPIO controllers, each one has 32 GPIOs and can be configured to be an interrupt controller.The GPIO controllers are compatible with the snps,dw-apb-gpio driver. This patch add the corresponding device tree nodes. Signed-off-by: Zhou Wang --- arch/arm/boot/dts/hip04.dtsi | 75 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi index 2388145..267942a 100644 --- a/arch/arm/boot/dts/hip04.dtsi +++ b/arch/arm/boot/dts/hip04.dtsi @@ -269,6 +269,81 @@ interrupts = <0 372 4>; }; + gpio@4003000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0x4003000 0x1000>; + + gpio3: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 392 4>; + }; + }; + + gpio@4002000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0x4002000 0x1000>; + + gpio2: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 391 4>; + }; + }; + + gpio@4001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0x4001000 0x1000>; + + gpio1: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 390 4>; + }; + }; + + gpio@4000000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0x4000000 0x1000>; + + gpio0: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 389 4>; + }; + }; }; etb@0,e3c42000 {