Message ID | 1421471974-32719-4-git-send-email-wens@csie.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Sat, Jan 17, 2015 at 01:19:28PM +0800, Chen-Yu Tsai wrote: > of_clk_get_parent_name() uses the clock-indices property to resolve > clock phandle arguments in case that the argument index does not > match the clock-output-names sequence. > > This is the case on sunxi, where we use the actual bit index as the > argument to the phandle. Add the clock-indices property so that > of_clk_get_parent_name() resolves the names correctly. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> Did you change anything in that patch? I already applied it from v3, so let me know if I need to drop it. Maxime
On Tue, Jan 20, 2015 at 5:59 AM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > On Sat, Jan 17, 2015 at 01:19:28PM +0800, Chen-Yu Tsai wrote: >> of_clk_get_parent_name() uses the clock-indices property to resolve >> clock phandle arguments in case that the argument index does not >> match the clock-output-names sequence. >> >> This is the case on sunxi, where we use the actual bit index as the >> argument to the phandle. Add the clock-indices property so that >> of_clk_get_parent_name() resolves the names correctly. >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org> > > Did you change anything in that patch? > > I already applied it from v3, so let me know if I need to drop it. Please drop it. I just didn't realize you merged it after our discussion. ChenYu
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 267ed149a5fa..820b4c5995f3 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -260,6 +260,9 @@ compatible = "allwinner,sun9i-a80-ahb0-gates-clk"; reg = <0x06000580 0x4>; clocks = <&ahb0>; + clock-indices = <0>, <1>, <3>, <5>, <8>, <12>, <13>, + <14>, <15>, <16>, <18>, <20>, <21>, + <22>, <23>; clock-output-names = "ahb0_fd", "ahb0_ve", "ahb0_gpu", "ahb0_ss", "ahb0_sd", "ahb0_nand1", "ahb0_nand0", "ahb0_sdram", @@ -273,6 +276,7 @@ compatible = "allwinner,sun9i-a80-ahb1-gates-clk"; reg = <0x06000584 0x4>; clocks = <&ahb1>; + clock-indices = <0>, <1>, <17>, <21>, <22>, <23>, <24>; clock-output-names = "ahb1_usbotg", "ahb1_usbhci", "ahb1_gmac", "ahb1_msgbox", "ahb1_spinlock", "ahb1_hstimer", @@ -284,6 +288,8 @@ compatible = "allwinner,sun9i-a80-ahb2-gates-clk"; reg = <0x06000588 0x4>; clocks = <&ahb2>; + clock-indices = <0>, <1>, <2>, <4>, <5>, <7>, <8>, + <11>; clock-output-names = "ahb2_lcd0", "ahb2_lcd1", "ahb2_edp", "ahb2_csi", "ahb2_hdmi", "ahb2_de", "ahb2_mp", "ahb2_mipi_dsi"; @@ -294,6 +300,8 @@ compatible = "allwinner,sun9i-a80-apb0-gates-clk"; reg = <0x06000590 0x4>; clocks = <&apb0>; + clock-indices = <1>, <5>, <11>, <12>, <13>, <15>, + <17>, <18>, <19>; clock-output-names = "apb0_spdif", "apb0_pio", "apb0_ac97", "apb0_i2s0", "apb0_i2s1", "apb0_lradc", "apb0_gpadc", "apb0_twd", @@ -305,6 +313,8 @@ compatible = "allwinner,sun9i-a80-apb1-gates-clk"; reg = <0x06000594 0x4>; clocks = <&apb1>; + clock-indices = <0>, <1>, <2>, <3>, <4>, + <16>, <17>, <18>, <19>, <20>, <21>; clock-output-names = "apb1_i2c0", "apb1_i2c1", "apb1_i2c2", "apb1_i2c3", "apb1_i2c4", "apb1_uart0", "apb1_uart1",
of_clk_get_parent_name() uses the clock-indices property to resolve clock phandle arguments in case that the argument index does not match the clock-output-names sequence. This is the case on sunxi, where we use the actual bit index as the argument to the phandle. Add the clock-indices property so that of_clk_get_parent_name() resolves the names correctly. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/boot/dts/sun9i-a80.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)