From patchwork Wed Jan 21 17:03:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 5679621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 47B16C058D for ; Wed, 21 Jan 2015 17:07:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 67C6420497 for ; Wed, 21 Jan 2015 17:07:29 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9646B20412 for ; Wed, 21 Jan 2015 17:07:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YDyio-0000Dx-4T; Wed, 21 Jan 2015 17:05:38 +0000 Received: from mail-wi0-f170.google.com ([209.85.212.170]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YDyhX-00076r-ME for linux-arm-kernel@lists.infradead.org; Wed, 21 Jan 2015 17:04:20 +0000 Received: by mail-wi0-f170.google.com with SMTP id em10so16359487wid.1 for ; Wed, 21 Jan 2015 09:03:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jqxAlLP/Dao5QLI3oolMiGSQqLc8glBAFaNWAYCOCro=; b=OLTbhN0ygNd6rlU1Fv4eCi66mF27OnPEQtBqW5aP6Q0WjLB6NZbxNLIQC+Z+E+9Bxl Zqu+UbjRcrqJWAW9CyXEGH+CeBFzqv9agjK/p3SrEERRKjLOmbY1a9KJnQElTJc8SVzS dwQIstJ+MsTip5M+DEUu1AHgZD1CgIYnPtLLu6WGHi47X0N9vS/Bb2qtLBNwoc4QrDv2 N+iq/My3OAyZKfYQG/zfZrf4z6Itb2sm1CxSiGv/w/n+tcBe5223TVCikLtcVX1oC1B1 Am1NGa/774ScUjxi4Gh7w5ZT5/BuLlRk/eXdCIJSAH9xpdQiw1KXf4oGxX6nOM0nnz++ UXPw== X-Gm-Message-State: ALoCoQlavGSDyRljmzNwOSVjP+3QESBRlSnmodfHMBNWZZjNFoYWOOWlro9JGITSt9F22zxHF0Cd X-Received: by 10.194.190.162 with SMTP id gr2mr76047508wjc.13.1421859837678; Wed, 21 Jan 2015 09:03:57 -0800 (PST) Received: from sundance.lan (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id w16sm8021260wia.15.2015.01.21.09.03.55 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Jan 2015 09:03:56 -0800 (PST) From: Daniel Thompson To: Thomas Gleixner , Jason Cooper , Russell King Subject: [RFC PATCH v2 4/5] arm: perf: Make v7 support FIQ-safe Date: Wed, 21 Jan 2015 17:03:41 +0000 Message-Id: <1421859822-3621-5-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1421859822-3621-1-git-send-email-daniel.thompson@linaro.org> References: <1421166931-14134-1-git-send-email-daniel.thompson@linaro.org> <1421859822-3621-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150121_090419_909196_9E7A6031 X-CRM114-Status: GOOD ( 11.65 ) X-Spam-Score: -0.7 (/) Cc: Daniel Thompson , linaro-kernel@lists.linaro.org, patches@linaro.org, Will Deacon , Stephen Boyd , linux-kernel@vger.kernel.org, Daniel Drake , Dmitry Pervushin , Dirk Behme , John Stultz , Tim Sander , Sumit Semwal , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP armv7pmu_disable_event() is called during irq handling. If irq handling switches over to fiq then the spin locks in this function risk deadlock. Both armv7_pmnc_disable_counter() and armv7_pmnc_disable_intens() are unconditional co-processor writes. I haven't yet come up with an schedule where other users of pmu_lock would break if interleaved with these calls so I have simply removed them. The other change required us to avoid calling irq_work_run() when run from a FIQ handler. The pended work will either be dispatched by the irq work IPI or by a timer handler. Signed-off-by: Daniel Thompson --- arch/arm/kernel/perf_event_v7.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 8993770c47de..08f426486d3e 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -744,7 +744,6 @@ static void armv7pmu_enable_event(struct perf_event *event) static void armv7pmu_disable_event(struct perf_event *event) { - unsigned long flags; struct hw_perf_event *hwc = &event->hw; struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); @@ -757,11 +756,6 @@ static void armv7pmu_disable_event(struct perf_event *event) } /* - * Disable counter and interrupt - */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); - - /* * Disable counter */ armv7_pmnc_disable_counter(idx); @@ -770,8 +764,6 @@ static void armv7pmu_disable_event(struct perf_event *event) * Disable interrupt for this counter */ armv7_pmnc_disable_intens(idx); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) @@ -831,7 +823,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) * platforms that can have the PMU interrupts raised as an NMI, this * will not work. */ - irq_work_run(); + if (!in_nmi()) + irq_work_run(); return IRQ_HANDLED; }