From patchwork Mon Jan 26 10:07:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenyou Yang X-Patchwork-Id: 5707701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 697C19F333 for ; Mon, 26 Jan 2015 10:10:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C3B720121 for ; Mon, 26 Jan 2015 10:10:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CD9AE2011E for ; Mon, 26 Jan 2015 10:10:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YFgav-0006ht-21; Mon, 26 Jan 2015 10:08:33 +0000 Received: from nasmtp01.atmel.com ([192.199.1.246] helo=DVREDG02.corp.atmel.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YFgam-0006Mh-DD for linux-arm-kernel@lists.infradead.org; Mon, 26 Jan 2015 10:08:25 +0000 Received: from apsmtp01.atmel.com (10.168.254.30) by DVREDG02.corp.atmel.com (10.42.103.31) with Microsoft SMTP Server (TLS) id 14.2.347.0; Mon, 26 Jan 2015 03:08:01 -0700 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.corp.atmel.com (10.168.254.30) with Microsoft SMTP Server id 14.2.347.0; Mon, 26 Jan 2015 18:10:51 +0800 From: Wenyou Yang To: , Subject: [PATCH 4/7] ARM: at91: enable the L2 Cache controller Date: Mon, 26 Jan 2015 18:07:16 +0800 Message-ID: <1422266836-24592-1-git-send-email-wenyou.yang@atmel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1422266617-24381-1-git-send-email-wenyou.yang@atmel.com> References: <1422266617-24381-1-git-send-email-wenyou.yang@atmel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150126_020824_608896_EA8480AB X-CRM114-Status: UNSURE ( 9.32 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: sylvain.rochet@finsecur.com, Patrice.VILCHEZ@atmel.com, linux-kernel@vger.kernel.org, wenyou.yang@atmel.com, alexandre.belloni@free-electrons.com, peda@axentia.se, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Wenyou Yang --- arch/arm/mach-at91/board-dt-sama5.c | 53 +++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c index 86cffcd..ed6db28 100644 --- a/arch/arm/mach-at91/board-dt-sama5.c +++ b/arch/arm/mach-at91/board-dt-sama5.c @@ -17,17 +17,70 @@ #include #include #include +#include #include #include #include #include #include +#include #include "generic.h" +void __iomem *at91_l2cc_base; +EXPORT_SYMBOL_GPL(at91_l2cc_base); + +#ifdef CONFIG_CACHE_L2X0 +static void __init at91_init_l2cache(void) +{ + struct device_node *np; + u32 reg; + + np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); + if (!np) + return; + + at91_l2cc_base = of_iomap(np, 0); + if (!at91_l2cc_base) + panic("unable to map l2cc cpu registers\n"); + + of_node_put(np); + + /* Disable cache if it hasn't been done yet */ + if (readl_relaxed(at91_l2cc_base + L2X0_CTRL) & L2X0_CTRL_EN) + writel_relaxed(~L2X0_CTRL_EN, at91_l2cc_base + L2X0_CTRL); + + /* Prefetch Control */ + reg = readl_relaxed(at91_l2cc_base + L310_PREFETCH_CTRL); + reg &= ~L310_PREFETCH_CTRL_OFFSET_MASK; + reg |= 0x01; + reg |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; + reg |= L310_PREFETCH_CTRL_PREFETCH_DROP; + reg |= L310_PREFETCH_CTRL_DATA_PREFETCH; + reg |= L310_PREFETCH_CTRL_INSTR_PREFETCH; + reg |= L310_PREFETCH_CTRL_DBL_LINEFILL; + writel_relaxed(reg, at91_l2cc_base + L310_PREFETCH_CTRL); + + /* Power Control */ + reg = readl_relaxed(at91_l2cc_base + L310_POWER_CTRL); + reg |= L310_STNDBY_MODE_EN; + reg |= L310_DYNAMIC_CLK_GATING_EN; + writel_relaxed(reg, at91_l2cc_base + L310_POWER_CTRL); + + /* Disable interrupts */ + writel_relaxed(0x00, at91_l2cc_base + L2X0_INTR_MASK); + writel_relaxed(0x01ff, at91_l2cc_base + L2X0_INTR_CLEAR); + l2x0_of_init(0, ~0UL); +} +#else +static inline void at91_init_l2cache(void) {} +#endif + static void __init sama5_dt_device_init(void) { + at91_init_l2cache(); + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); at91_sam9x5_pm_init(); }