From patchwork Tue Aug 28 11:13:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1380741 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 69AD33FC85 for ; Tue, 28 Aug 2012 11:17:07 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6JkC-0000Kc-51; Tue, 28 Aug 2012 11:14:04 +0000 Received: from mailout4.samsung.com ([203.254.224.34]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6Jk6-0000JR-38 for linux-arm-kernel@lists.infradead.org; Tue, 28 Aug 2012 11:13:59 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M9G00IZKPUVQ9B0@mailout4.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 28 Aug 2012 20:13:45 +0900 (KST) X-AuditID: cbfee61b-b7faf6d00000476a-d3-503ca7e977df Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 5A.42.18282.9E7AC305; Tue, 28 Aug 2012 20:13:45 +0900 (KST) Received: from amdc1227.localnet ([106.116.147.199]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M9G00ALPPUTFV60@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 28 Aug 2012 20:13:45 +0900 (KST) From: Tomasz Figa To: linux-samsung-soc Subject: [PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 Date: Tue, 28 Aug 2012 13:13:40 +0200 Message-id: <1422318.SfZfh0XoVo@amdc1227> Organization: Samsung Poland R&D Center User-Agent: KMail/4.9 (Linux/3.5.2-gentoo; KDE/4.9.0; x86_64; ; ) MIME-version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprDLMWRmVeSWpSXmKPExsVy+t9jQd2Xy20CDM63mlhsenyN1YHRY/OS +gDGKC6blNSczLLUIn27BK6Mpd9EC/7xVxy8Oo+9gXEKbxcjJ4eEgInEgecv2CFsMYkL99az dTFycQgJTGeUuP9xMwtIQkhgLZPE194yEJtNQE3ic8MjNhBbRMBS4uLn/SwgDcwCuxklNnes ZOpi5OAQFgiRuL0hCqSGRUBVYmHzdGYQm1dAU+Ja81VGEJtfQF3i3banTCC2qICjxNdJEDav gKDEj8n3wPYyC8hL7Ns/lRXC1pJYv/M40wRG/llIymYhKZuFpGwBI/MqRtHUguSC4qT0XCO9 4sTc4tK8dL3k/NxNjOAweya9g3FVg8UhRgEORiUe3oBd1gFCrIllxZW5hxglOJiVRHhXVdkE CPGmJFZWpRblxxeV5qQWH2KU5mBREufl7zMMEBJITyxJzU5NLUgtgskycXBKNTA6Rv49cMd6 2kvnkzPrTN6qzd1RKngzdmbYX7cTNkdtrtx6/45jcj+TTpbZPebftksdJ/npbjXXnrrh9pSu K33yre1ZUtEqSq+WL/I5tO+eVXzYpbfHhJakVZlk2PXpVDZnzzXPigsTqmOWUwzK1+STK12Q 8/uz9cUjPIHnln+TFZk2fdr5JxlKLMUZiYZazEXFiQBMhwrNLwIAAA== X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.1 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.34 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kyungmin Park , Kukjin Kim , linux-arm-kernel , Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Exynos4412 uses different information register for each core. This patch adjusts the bring-up code to take that into account. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- arch/arm/mach-exynos/platsmp.c | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 36c3984..1114ced 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -34,8 +34,19 @@ extern void exynos4_secondary_startup(void); -#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ - S5P_INFORM5 : S5P_VA_SYSRAM) +static inline volatile void *cpu_boot_reg_base(void) +{ + if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) + return S5P_INFORM5; + return S5P_VA_SYSRAM; +} + +static inline volatile void *cpu_boot_reg(int cpu) +{ + if (soc_is_exynos4412()) + return cpu_boot_reg_base() + 4*cpu; + return cpu_boot_reg_base(); +} /* * control for which core is the next to come out of the secondary @@ -138,7 +149,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) smp_rmb(); __raw_writel(virt_to_phys(exynos4_secondary_startup), - CPU1_BOOT_REG); + cpu_boot_reg(cpu)); gic_raise_softirq(cpumask_of(cpu), 1); if (pen_release == -1) @@ -186,6 +197,8 @@ void __init smp_init_cpus(void) void __init platform_smp_prepare_cpus(unsigned int max_cpus) { + int i; + if (!soc_is_exynos5250()) scu_enable(scu_base_addr()); @@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - __raw_writel(virt_to_phys(exynos4_secondary_startup), - CPU1_BOOT_REG); + for (i = 1; i < max_cpus; ++i) { + __raw_writel(virt_to_phys(exynos4_secondary_startup), + cpu_boot_reg(i)); + } }