From patchwork Wed Jan 28 09:27:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?RWRkaWUgSHVhbmcgKOm7g+aZuuWCkSk=?= X-Patchwork-Id: 5727701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A324BBF440 for ; Wed, 28 Jan 2015 09:31:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 649D2202C8 for ; Wed, 28 Jan 2015 09:31:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2A92B202B8 for ; Wed, 28 Jan 2015 09:31:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YGOvy-0006Zq-RZ; Wed, 28 Jan 2015 09:29:14 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YGOvc-0006LA-Ch for linux-arm-kernel@lists.infradead.org; Wed, 28 Jan 2015 09:28:54 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 144614978; Wed, 28 Jan 2015 17:28:29 +0800 Received: from mtkslt208.mediatek.inc (10.21.15.95) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Wed, 28 Jan 2015 17:28:27 +0800 From: Eddie Huang To: Alessandro Zummo , Matthias Brugger Subject: [PATCH 2/2] rtc: mediatek: Add MT63xx RTC driver Date: Wed, 28 Jan 2015 17:27:56 +0800 Message-ID: <1422437276-41334-3-git-send-email-eddie.huang@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1422437276-41334-1-git-send-email-eddie.huang@mediatek.com> References: <1422437276-41334-1-git-send-email-eddie.huang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150128_012852_883339_43C83655 X-CRM114-Status: GOOD ( 16.52 ) X-Spam-Score: 1.3 (+) Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Pawel Moll , Ian Campbell , rtc-linux@googlegroups.com, yh.chen@mediatek.com, linux-kernel@vger.kernel.org, Tianping Fang , Rob Herring , Sascha Hauer , Kumar Gala , Grant Likely , yingjoe.chen@mediatek.com, Eddie Huang , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tianping Fang Add Mediatek MT63xx RTC driver Signed-off-by: Tianping Fang Signed-off-by: Eddie Huang --- drivers/rtc/Kconfig | 10 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-mt6397.c | 352 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 363 insertions(+) create mode 100644 drivers/rtc/rtc-mt6397.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index f15cddf..8ac52d8 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1427,6 +1427,16 @@ config RTC_DRV_MOXART This driver can also be built as a module. If so, the module will be called rtc-moxart +config RTC_DRV_MT63XX + tristate "Mediatek Real Time Clock driver" + depends on MFD_MT6397 + help + This selects the Mediatek(R) RTC driver, you should add support + for Mediatek MT6397 PMIC before select Mediatek(R) RTC driver. + + If you want to use Mediatek(R) RTC interface, select Y or M here. + If unsure, Please select N. + config RTC_DRV_XGENE tristate "APM X-Gene RTC" depends on HAS_IOMEM diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index c8ef3e1..53e0085 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -150,3 +150,4 @@ obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o obj-$(CONFIG_RTC_DRV_XGENE) += rtc-xgene.o obj-$(CONFIG_RTC_DRV_SIRFSOC) += rtc-sirfsoc.o obj-$(CONFIG_RTC_DRV_MOXART) += rtc-moxart.o +obj-$(CONFIG_RTC_DRV_MT63XX) += rtc-mt6397.o diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c new file mode 100644 index 0000000..b54d605 --- /dev/null +++ b/drivers/rtc/rtc-mt6397.c @@ -0,0 +1,352 @@ +/* +* Copyright (c) 2014-2015 MediaTek Inc. +* Author: Tianping.Fang +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RTC_BBPU 0x0000 +#define RTC_WRTGR 0x003c +#define RTC_IRQ_EN 0x0004 +#define RTC_IRQ_STA 0x0002 + +#define RTC_BBPU_CBUSY (1 << 6) +#define RTC_BBPU_KEY (0x43 << 8) +#define RTC_BBPU_AUTO (1 << 3) +#define RTC_IRQ_STA_AL (1 << 0) +#define RTC_IRQ_STA_LP (1 << 3) + +#define RTC_TC_SEC 0x000a +#define RTC_TC_MIN 0x000c +#define RTC_TC_HOU 0x000e +#define RTC_TC_DOM 0x0010 +#define RTC_TC_MTH 0x0014 +#define RTC_TC_YEA 0x0016 +#define RTC_AL_SEC 0x0018 +#define RTC_AL_MIN 0x001a + +#define RTC_IRQ_EN_AL (1 << 0) +#define RTC_IRQ_EN_ONESHOT (1 << 2) +#define RTC_IRQ_EN_LP (1 << 3) +#define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL) + +#define RTC_TC_MIN_MASK 0x003f +#define RTC_TC_SEC_MASK 0x003f +#define RTC_TC_HOU_MASK 0x001f +#define RTC_TC_DOM_MASK 0x001f +#define RTC_TC_MTH_MASK 0x000f +#define RTC_TC_YEA_MASK 0x007f + +#define RTC_AL_SEC_MASK 0x003f +#define RTC_AL_MIN_MASK 0x003f +#define RTC_AL_MASK_DOW (1 << 4) + +#define RTC_AL_HOU 0x001c +#define RTC_NEW_SPARE_FG_MASK 0xff00 +#define RTC_NEW_SPARE_FG_SHIFT 8 +#define RTC_AL_HOU_MASK 0x001f + +#define RTC_AL_DOM 0x001e +#define RTC_NEW_SPARE1 0xff00 +#define RTC_AL_DOM_MASK 0x001f +#define RTC_AL_MASK 0x0008 + +#define RTC_AL_MTH 0x0022 +#define RTC_NEW_SPARE3 0xff00 +#define RTC_AL_MTH_MASK 0x000f + +#define RTC_AL_YEA 0x0024 +#define RTC_AL_YEA_MASK 0x007f + +#define RTC_PDN1 0x002c +#define RTC_PDN1_PWRON_TIME (1 << 7) + +#define RTC_PDN2 0x002e +#define RTC_PDN2_PWRON_MTH_MASK 0x000f +#define RTC_PDN2_PWRON_MTH_SHIFT 0 +#define RTC_PDN2_PWRON_ALARM (1 << 4) +#define RTC_PDN2_UART_MASK 0x0060 +#define RTC_PDN2_UART_SHIFT 5 +#define RTC_PDN2_PWRON_YEA_MASK 0x7f00 +#define RTC_PDN2_PWRON_YEA_SHIFT 8 +#define RTC_PDN2_PWRON_LOGO (1 << 15) + +#define RTC_MIN_YEAR 1968 +#define RTC_BASE_YEAR 1900 +#define RTC_NUM_YEARS 128 +#define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR) +#define RTC_RELPWR_WHEN_XRST 1 + +struct mt6397_rtc { + struct device *dev; + struct rtc_device *rtc_dev; + struct mutex lock; + struct regmap *regmap; + int irq; + u32 addr_base; + u32 addr_range; +}; + +static u16 rtc_read(struct mt6397_rtc *rtc, u32 offset) +{ + u32 rdata = 0; + u32 addr = rtc->addr_base + offset; + + if (offset < rtc->addr_range) + regmap_read(rtc->regmap, addr, &rdata); + + return (u16)rdata; +} + +static void rtc_write(struct mt6397_rtc *rtc, u32 offset, u32 data) +{ + u32 addr; + + addr = rtc->addr_base + offset; + + if (offset < rtc->addr_range) + regmap_write(rtc->regmap, addr, data); +} + +static void rtc_write_trigger(struct mt6397_rtc *rtc) +{ + rtc_write(rtc, RTC_WRTGR, 1); + while (rtc_read(rtc, RTC_BBPU) & RTC_BBPU_CBUSY) + cpu_relax(); +} + +static irqreturn_t rtc_irq_handler_thread(int irq, void *data) +{ + struct mt6397_rtc *rtc = data; + u16 irqsta, irqen; + + mutex_lock(&rtc->lock); + irqsta = rtc_read(rtc, RTC_IRQ_STA); + mutex_unlock(&rtc->lock); + + if (irqsta & RTC_IRQ_STA_AL) { + rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF); + irqen = irqsta & ~RTC_IRQ_EN_AL; + rtc_write(rtc, RTC_IRQ_EN, irqen); + rtc_write_trigger(rtc); + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + +static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + unsigned long time; + struct mt6397_rtc *rtc = dev_get_drvdata(dev); + + mutex_lock(&rtc->lock); + do { + tm->tm_sec = rtc_read(rtc, RTC_TC_SEC); + tm->tm_min = rtc_read(rtc, RTC_TC_MIN); + tm->tm_hour = rtc_read(rtc, RTC_TC_HOU); + tm->tm_mday = rtc_read(rtc, RTC_TC_DOM); + tm->tm_mon = rtc_read(rtc, RTC_TC_MTH); + tm->tm_year = rtc_read(rtc, RTC_TC_YEA); + } while (rtc_read(rtc, RTC_TC_SEC) < tm->tm_sec); + mutex_unlock(&rtc->lock); + + tm->tm_year += RTC_MIN_YEAR_OFFSET; + tm->tm_mon--; + rtc_tm_to_time(tm, &time); + + tm->tm_wday = (time / 86400 + 4) % 7; + + return 0; +} + +static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct mt6397_rtc *rtc = dev_get_drvdata(dev); + + tm->tm_year -= RTC_MIN_YEAR_OFFSET; + tm->tm_mon++; + mutex_lock(&rtc->lock); + rtc_write(rtc, RTC_TC_YEA, tm->tm_year); + rtc_write(rtc, RTC_TC_MTH, tm->tm_mon); + rtc_write(rtc, RTC_TC_DOM, tm->tm_mday); + rtc_write(rtc, RTC_TC_HOU, tm->tm_hour); + rtc_write(rtc, RTC_TC_MIN, tm->tm_min); + rtc_write(rtc, RTC_TC_SEC, tm->tm_sec); + rtc_write_trigger(rtc); + mutex_unlock(&rtc->lock); + + return 0; +} + +static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + struct rtc_time *tm = &alm->time; + struct mt6397_rtc *rtc = dev_get_drvdata(dev); + u16 irqen, pdn2; + + mutex_lock(&rtc->lock); + irqen = rtc_read(rtc, RTC_IRQ_EN); + pdn2 = rtc_read(rtc, RTC_PDN2); + tm->tm_sec = rtc_read(rtc, RTC_AL_SEC); + tm->tm_min = rtc_read(rtc, RTC_AL_MIN); + tm->tm_hour = rtc_read(rtc, RTC_AL_HOU) & RTC_AL_HOU_MASK; + tm->tm_mday = rtc_read(rtc, RTC_AL_DOM) & RTC_AL_DOM_MASK; + tm->tm_mon = rtc_read(rtc, RTC_AL_MTH) & RTC_AL_MTH_MASK; + tm->tm_year = rtc_read(rtc, RTC_AL_YEA); + mutex_unlock(&rtc->lock); + + alm->enabled = !!(irqen & RTC_IRQ_EN_AL); + alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM); + + tm->tm_year += RTC_MIN_YEAR_OFFSET; + tm->tm_mon--; + + return 0; +} + +static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + struct rtc_time *tm = &alm->time; + struct mt6397_rtc *rtc = dev_get_drvdata(dev); + u16 irqen; + + tm->tm_year -= RTC_MIN_YEAR_OFFSET; + tm->tm_mon++; + + if (alm->enabled) { + mutex_lock(&rtc->lock); + rtc_write(rtc, RTC_AL_YEA, tm->tm_year); + rtc_write(rtc, RTC_AL_MTH, (rtc_read(rtc, RTC_AL_MTH) & + RTC_NEW_SPARE3) | tm->tm_mon); + rtc_write(rtc, RTC_AL_DOM, (rtc_read(rtc, RTC_AL_DOM) & + RTC_NEW_SPARE1) | tm->tm_mday); + rtc_write(rtc, RTC_AL_HOU, (rtc_read(rtc, RTC_AL_HOU) & + RTC_NEW_SPARE_FG_MASK) | tm->tm_hour); + rtc_write(rtc, RTC_AL_MIN, tm->tm_min); + rtc_write(rtc, RTC_AL_SEC, tm->tm_sec); + rtc_write(rtc, RTC_AL_MASK, RTC_AL_MASK_DOW); + rtc_write_trigger(rtc); + irqen = rtc_read(rtc, RTC_IRQ_EN) | RTC_IRQ_EN_ONESHOT_AL; + rtc_write(rtc, RTC_IRQ_EN, irqen); + rtc_write_trigger(rtc); + mutex_unlock(&rtc->lock); + } + + return 0; +} + +static struct rtc_class_ops mtk_rtc_ops = { + .read_time = mtk_rtc_read_time, + .set_time = mtk_rtc_set_time, + .read_alarm = mtk_rtc_read_alarm, + .set_alarm = mtk_rtc_set_alarm, +}; + +static int mtk_rtc_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent); + struct mt6397_rtc *rtc; + u32 reg[2]; + int ret = 0; + + rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL); + if (!rtc) + return -ENOMEM; + + ret = of_property_read_u32_array(pdev->dev.of_node, "reg", reg, 2); + if (ret) { + dev_err(&pdev->dev, "couldn't read rtc base address!\n"); + return -EINVAL; + } + rtc->addr_base = reg[0]; + rtc->addr_range = reg[1]; + rtc->regmap = mt6397_chip->regmap; + rtc->dev = &pdev->dev; + mutex_init(&rtc->lock); + + platform_set_drvdata(pdev, rtc); + + rtc->rtc_dev = rtc_device_register("mt6397-rtc", &pdev->dev, + &mtk_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc->rtc_dev)) { + dev_err(&pdev->dev, "register rtc device failed\n"); + return PTR_ERR(rtc->rtc_dev); + } + + rtc->irq = platform_get_irq(pdev, 0); + if (rtc->irq < 0) { + ret = rtc->irq; + goto out_rtc; + } + + ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, + rtc_irq_handler_thread, IRQF_ONESHOT, + "mt6397-rtc", rtc); + if (ret) { + dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", + rtc->irq, ret); + goto out_rtc; + } + + device_init_wakeup(&pdev->dev, 1); + + return 0; + +out_rtc: + rtc_device_unregister(rtc->rtc_dev); + return ret; + +} + +static int mtk_rtc_remove(struct platform_device *pdev) +{ + struct mt6397_rtc *rtc = platform_get_drvdata(pdev); + + rtc_device_unregister(rtc->rtc_dev); + return 0; +} + +static const struct of_device_id mt6397_rtc_of_match[] = { + { .compatible = "mediatek,mt6397-rtc", }, + { } +}; + +static struct platform_driver mtk_rtc_driver = { + .driver = { + .name = "mt6397-rtc", + .of_match_table = mt6397_rtc_of_match, + }, + .probe = mtk_rtc_probe, + .remove = mtk_rtc_remove, +}; + +module_platform_driver(mtk_rtc_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Tianping Fang "); +MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC"); +MODULE_ALIAS("platform:mt6397-rtc");