| Message ID | 1423671332-24580-10-git-send-email-antoine.tenart@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 11.02.2015 17:15, Antoine Tenart wrote: > The chip and system controller nodes are now handled by the Berlin > controller mfd driver. Its sub-devices are then registered by the mfd > driver and let the drivers be probed properly, using their own > sub-nodes. > > Rework the device tree to take this changes into account. > > Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> > --- [...] > - chip: chip-control@ea0000 { > - compatible = "marvell,berlin2-chip-ctrl"; > - #clock-cells = <1>; > - #reset-cells = <2>; > + chip: chip-controller@ea0000 { > + compatible = "marvell,berlin2-chip-ctrl", "syscon"; > reg = <0xea0000 0x400>; > + #clock-cells = <1>; Antoine, I noticed just now, but we should either have all of clock, reset, pinctrl as sub-nodes or none. Currently, this has pinctrl and reset as sub-nodes but clock hooked up to chip-controller. Sebastian > clocks = <&refclk>; > clock-names = "refclk"; > > - emmc_pmux: emmc-pmux { > - groups = "G26"; > - function = "emmc"; > + soc_pinctrl: pin-controller { > + compatible = "marvell,berlin2-soc-pinctrl"; > + > + emmc_pmux: emmc-pmux { > + groups = "G26"; > + function = "emmc"; > + }; > + }; > + > + chip_rst: reset { > + compatible = "marvell,berlin2-reset"; > + #reset-cells = <2>; > }; > }; > > @@ -442,22 +450,26 @@ > }; > > sysctrl: system-controller@d000 { > - compatible = "marvell,berlin2-system-ctrl"; > + compatible = "marvell,berlin2-system-ctrl", "syscon"; > reg = <0xd000 0x100>; > > - uart0_pmux: uart0-pmux { > - groups = "GSM4"; > - function = "uart0"; > - }; > + sys_pinctrl: pin-controller { > + compatible = "marvell,berlin2-system-pinctrl"; > > - uart1_pmux: uart1-pmux { > - groups = "GSM5"; > - function = "uart1"; > - }; > + uart0_pmux: uart0-pmux { > + groups = "GSM4"; > + function = "uart0"; > + }; > + > + uart1_pmux: uart1-pmux { > + groups = "GSM5"; > + function = "uart1"; > + }; > > - uart2_pmux: uart2-pmux { > - groups = "GSM3"; > - function = "uart2"; > + uart2_pmux: uart2-pmux { > + groups = "GSM3"; > + function = "uart2"; > + }; > }; > }; > >
Hi Sebastian! On Wed, Feb 18, 2015 at 11:29:50AM +0100, Sebastian Hesselbarth wrote: > On 11.02.2015 17:15, Antoine Tenart wrote: > [...] > >- chip: chip-control@ea0000 { > >- compatible = "marvell,berlin2-chip-ctrl"; > >- #clock-cells = <1>; > >- #reset-cells = <2>; > >+ chip: chip-controller@ea0000 { > >+ compatible = "marvell,berlin2-chip-ctrl", "syscon"; > > reg = <0xea0000 0x400>; > >+ #clock-cells = <1>; > > I noticed just now, but we should either have all of clock, reset, > pinctrl as sub-nodes or none. Currently, this has pinctrl and reset > as sub-nodes but clock hooked up to chip-controller. Of course. The clock rework is part of the other series[1] which modifies the clock driver to use regmap but also move the clock into its own sub-node. Antoine [1] https://lkml.org/lkml/2015/2/13/252
On 18.02.2015 11:33, Antoine Tenart wrote: > On Wed, Feb 18, 2015 at 11:29:50AM +0100, Sebastian Hesselbarth wrote: >> On 11.02.2015 17:15, Antoine Tenart wrote: >> [...] >>> - chip: chip-control@ea0000 { >>> - compatible = "marvell,berlin2-chip-ctrl"; >>> - #clock-cells = <1>; >>> - #reset-cells = <2>; >>> + chip: chip-controller@ea0000 { >>> + compatible = "marvell,berlin2-chip-ctrl", "syscon"; >>> reg = <0xea0000 0x400>; >>> + #clock-cells = <1>; >> >> I noticed just now, but we should either have all of clock, reset, >> pinctrl as sub-nodes or none. Currently, this has pinctrl and reset >> as sub-nodes but clock hooked up to chip-controller. > > Of course. The clock rework is part of the other series[1] which > modifies the clock driver to use regmap but also move the clock into > its own sub-node. Ah, ok. I misinterpreted the addition of #clock-cells above, but it gets removed and re-added again. Sebastian
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 015a06c67c91..498ffd5b0e05 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -350,17 +350,25 @@ }; }; - chip: chip-control@ea0000 { - compatible = "marvell,berlin2-chip-ctrl"; - #clock-cells = <1>; - #reset-cells = <2>; + chip: chip-controller@ea0000 { + compatible = "marvell,berlin2-chip-ctrl", "syscon"; reg = <0xea0000 0x400>; + #clock-cells = <1>; clocks = <&refclk>; clock-names = "refclk"; - emmc_pmux: emmc-pmux { - groups = "G26"; - function = "emmc"; + soc_pinctrl: pin-controller { + compatible = "marvell,berlin2-soc-pinctrl"; + + emmc_pmux: emmc-pmux { + groups = "G26"; + function = "emmc"; + }; + }; + + chip_rst: reset { + compatible = "marvell,berlin2-reset"; + #reset-cells = <2>; }; }; @@ -442,22 +450,26 @@ }; sysctrl: system-controller@d000 { - compatible = "marvell,berlin2-system-ctrl"; + compatible = "marvell,berlin2-system-ctrl", "syscon"; reg = <0xd000 0x100>; - uart0_pmux: uart0-pmux { - groups = "GSM4"; - function = "uart0"; - }; + sys_pinctrl: pin-controller { + compatible = "marvell,berlin2-system-pinctrl"; - uart1_pmux: uart1-pmux { - groups = "GSM5"; - function = "uart1"; - }; + uart0_pmux: uart0-pmux { + groups = "GSM4"; + function = "uart0"; + }; + + uart1_pmux: uart1-pmux { + groups = "GSM5"; + function = "uart1"; + }; - uart2_pmux: uart2-pmux { - groups = "GSM3"; - function = "uart2"; + uart2_pmux: uart2-pmux { + groups = "GSM3"; + function = "uart2"; + }; }; };
The chip and system controller nodes are now handled by the Berlin controller mfd driver. Its sub-devices are then registered by the mfd driver and let the drivers be probed properly, using their own sub-nodes. Rework the device tree to take this changes into account. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> --- arch/arm/boot/dts/berlin2.dtsi | 50 ++++++++++++++++++++++++++---------------- 1 file changed, 31 insertions(+), 19 deletions(-)