From patchwork Sun Feb 15 09:32:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Wu X-Patchwork-Id: 5829791 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C898EBF440 for ; Sun, 15 Feb 2015 09:37:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3BE4020145 for ; Sun, 15 Feb 2015 09:37:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9375201F5 for ; Sun, 15 Feb 2015 09:37:13 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YMvbo-0001ZW-Du; Sun, 15 Feb 2015 09:35:24 +0000 Received: from szxga01-in.huawei.com ([119.145.14.64]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YMva2-0007ML-U4 for linux-arm-kernel@lists.infradead.org; Sun, 15 Feb 2015 09:33:37 +0000 Received: from 172.24.2.119 (EHLO szxeml432-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CJO10791; Sun, 15 Feb 2015 17:32:51 +0800 (CST) Received: from localhost (10.177.24.136) by szxeml432-hub.china.huawei.com (10.82.67.209) with Microsoft SMTP Server id 14.3.158.1; Sun, 15 Feb 2015 17:32:44 +0800 From: Yun Wu To: , , Subject: [PATCH v2 6/6] irqchip: gicv3: skip ITS init when no ITS available Date: Sun, 15 Feb 2015 17:32:03 +0800 Message-ID: <1423992723-5028-7-git-send-email-wuyun.wu@huawei.com> X-Mailer: git-send-email 1.9.4.msysgit.1 In-Reply-To: <1423992723-5028-1-git-send-email-wuyun.wu@huawei.com> References: <1423992723-5028-1-git-send-email-wuyun.wu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.24.136] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150215_013335_378134_BA253361 X-CRM114-Status: GOOD ( 11.48 ) X-Spam-Score: -0.7 (/) Cc: Yun Wu , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is one more condition that needs to be considered when judging whether LPI feature is enabled or not, which is whether there is any ITS available and correctly enabled. This patch will fix this by caching ITS enabling status in the GIC chip data structure. Signed-off-by: Yun Wu --- drivers/irqchip/irq-gic-v3.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) -- 1.8.0 diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 1a146cc..e17faca 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -47,6 +47,7 @@ struct gic_chip_data { u64 redist_stride; u32 nr_redist_regions; unsigned int irq_nr; + int lpi_enabled; }; static struct gic_chip_data gic_data __read_mostly; @@ -390,11 +391,6 @@ static void gic_cpu_sys_reg_init(void) gic_write_grpen1(1); } -static int gic_dist_supports_lpis(void) -{ - return !!(readl_relaxed(gic_data.dist_base + GICD_TYPER) & GICD_TYPER_LPIS); -} - static void gic_cpu_init(void) { void __iomem *rbase; @@ -410,7 +406,7 @@ static void gic_cpu_init(void) gic_cpu_config(rbase, gic_redist_wait_for_rwp); /* Give LPIs a spin */ - if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis()) + if (gic_data.lpi_enabled) its_cpu_init(); /* initialise system registers */ @@ -629,7 +625,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, } /* LPIs */ if (hw >= 8192 && hw < GIC_ID_NR) { - if (!gic_dist_supports_lpis()) + if (!gic_data.lpi_enabled) return -EPERM; irq_domain_set_info(d, irq, hw, &gic_chip, d->host_data, handle_fasteoi_irq, NULL, NULL); @@ -785,8 +781,12 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare set_handle_irq(gic_handle_irq); - if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis()) - its_init(node, &gic_data.rdists, gic_data.domain); + if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && + !!(readl_relaxed(dist_base + GICD_TYPER) & GICD_TYPER_LPIS) && + !its_init(node, &gic_data.rdists, gic_data.domain)) + gic_data.lpi_enabled = 1; + else + gic_data.lpi_enabled = 0; gic_smp_init(); gic_dist_init();