From patchwork Wed Feb 18 11:49:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 5843831 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 120D59F373 for ; Wed, 18 Feb 2015 11:55:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D16D520225 for ; Wed, 18 Feb 2015 11:55:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 96FEB20221 for ; Wed, 18 Feb 2015 11:55:42 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YO3Bf-0002nZ-6P; Wed, 18 Feb 2015 11:53:03 +0000 Received: from mail-wg0-f42.google.com ([74.125.82.42]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YO38c-0007uu-UK for linux-arm-kernel@lists.infradead.org; Wed, 18 Feb 2015 11:49:58 +0000 Received: by mail-wg0-f42.google.com with SMTP id n12so674288wgh.1 for ; Wed, 18 Feb 2015 03:49:32 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XLovtJimhVB4dGcU7/gB05I5NxCsYBZz0yMBsiP1Kbk=; b=UvhyhdZNSiA2uI4h/GML/M6Sk6ye9JXnT0pDcQs5BE2aMoDlVpOff6xIuj7HbvDL+Z +jOAUtKHt3/WTF6I9CWS+CPAPg7E1lksDQZAoYUwAxzKtHddE+bWVY1cYQF4f8g//BK2 6rsl2rRb+rAfdCz61az33ETRt69Vym8YyvGAEDPOHsW65EZrhEUTudhZkyPkdUsW1lPb aOsIMAmO5yAZHtSvfGnWdLW0pWOJmx9r0WH5WGV1SiX3Frs92oeRs+7dyBns/LGz+sqw lGK+ORMp9Rb8IvMg2ZDqaM1+XbhpxJIeXlF1wv9eb01BaCGaIrTjaxlBQQLLGpewHLe3 7XRg== X-Gm-Message-State: ALoCoQkGuJ71hJbEX4/ChlW/iB6JWqIU2sVFykxz/XTGcsxGzcdwDjgLkoU8INjvK0dxDGiVy4tw X-Received: by 10.194.48.12 with SMTP id h12mr73733719wjn.74.1424260172114; Wed, 18 Feb 2015 03:49:32 -0800 (PST) Received: from localhost.localdomain (host109-148-233-190.range109-148.btcentralplus.com. [109.148.233.190]) by mx.google.com with ESMTPSA id dj5sm32257609wjb.28.2015.02.18.03.49.30 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Feb 2015 03:49:31 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 7/8] rtc: st: add new driver for ST's LPC RTC Date: Wed, 18 Feb 2015 11:49:13 +0000 Message-Id: <1424260154-12868-8-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424260154-12868-1-git-send-email-lee.jones@linaro.org> References: <1424260154-12868-1-git-send-email-lee.jones@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150218_034955_334398_8280395C X-CRM114-Status: GOOD ( 24.65 ) X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, kernel@stlinux.com, rtc-linux@googlegroups.com, david.paris@st.com, wim@iguana.be, lee.jones@linaro.org, linux@roeck-us.net, linux-watchdog@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ST's Low Power Controller (LPC) controls two devices; watchdog and RTC. Only one of the devices can be used at any one time. This is enforced by the correlating MFD driver. This portion of the driver-set controls the Real Time Clock. Signed-off-by: Lee Jones --- drivers/rtc/Kconfig | 12 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-st-lpc.c | 354 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 367 insertions(+) create mode 100644 drivers/rtc/rtc-st-lpc.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index f15cddf..ca509e8 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1417,6 +1417,18 @@ config RTC_DRV_SIRFSOC Say "yes" here to support the real time clock on SiRF SOC chips. This driver can also be built as a module called rtc-sirfsoc. +config RTC_DRV_ST_LPC + tristate "STMicroelectronics LPC RTC" + depends on ARCH_STI + depends on OF + select MFD_ST_LPC + help + Say Y here to include STMicroelectronics Low Power Controller + (LPC) based RTC support. + + To compile this driver as a module, choose M here: the + module will be called rtc-st-lpc. + config RTC_DRV_MOXART tristate "MOXA ART RTC" depends on ARCH_MOXART || COMPILE_TEST diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index c8ef3e1..6dbb7d9 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -149,4 +149,5 @@ obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o obj-$(CONFIG_RTC_DRV_XGENE) += rtc-xgene.o obj-$(CONFIG_RTC_DRV_SIRFSOC) += rtc-sirfsoc.o +obj-$(CONFIG_RTC_DRV_ST_LPC) += rtc-st-lpc.o obj-$(CONFIG_RTC_DRV_MOXART) += rtc-moxart.o diff --git a/drivers/rtc/rtc-st-lpc.c b/drivers/rtc/rtc-st-lpc.c new file mode 100644 index 0000000..f1344ac --- /dev/null +++ b/drivers/rtc/rtc-st-lpc.c @@ -0,0 +1,354 @@ +/* + * rtc-st-lpc.c - ST's LPC RTC, powered by the Low Power Timer + * + * Copyright (C) 2014 STMicroelectronics Limited + * + * Author: David Paris for STMicroelectronics + * Lee Jones for STMicroelectronics + * + * Based on the original driver written by Stuart Menefy. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* Low Power Timer */ +#define LPC_LPT_LSB_OFF 0x400 +#define LPC_LPT_MSB_OFF 0x404 +#define LPC_LPT_START_OFF 0x408 + +/* Low Power Alarm */ +#define LPC_LPA_LSB_OFF 0x410 +#define LPC_LPA_MSB_OFF 0x414 +#define LPC_LPA_START_OFF 0x418 + +/* LPC as WDT */ +#define LPC_WDT_OFF 0x510 +#define LPC_WDT_FLAG_OFF 0x514 + +struct st_rtc { + struct rtc_device *rtc_dev; + struct rtc_wkalrm alarm; + struct resource *res; + struct clk *clk; + unsigned long clkrate; + void __iomem *ioaddr; + bool irq_enabled:1; + spinlock_t lock; + short irq; +}; + +static void st_rtc_set_hw_alarm(struct st_rtc *rtc, + unsigned long msb, unsigned long lsb) +{ + unsigned long flags; + + spin_lock_irqsave(&rtc->lock, flags); + + writel(1, rtc->ioaddr + LPC_WDT_OFF); + + writel(msb, rtc->ioaddr + LPC_LPA_MSB_OFF); + writel(lsb, rtc->ioaddr + LPC_LPA_LSB_OFF); + writel(1, rtc->ioaddr + LPC_LPA_START_OFF); + + writel(0, rtc->ioaddr + LPC_WDT_OFF); + + spin_unlock_irqrestore(&rtc->lock, flags); +} + +static irqreturn_t st_rtc_handler(int this_irq, void *data) +{ + struct st_rtc *rtc = (struct st_rtc *)data; + + rtc_update_irq(rtc->rtc_dev, 1, RTC_AF); + + return IRQ_HANDLED; +} + +static int st_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + unsigned long lpt_lsb, lpt_msb; + unsigned long long lpt; + unsigned long flags; + + spin_lock_irqsave(&rtc->lock, flags); + + do { + lpt_msb = readl(rtc->ioaddr + LPC_LPT_MSB_OFF); + lpt_lsb = readl(rtc->ioaddr + LPC_LPT_LSB_OFF); + } while (readl(rtc->ioaddr + LPC_LPT_MSB_OFF) != lpt_msb); + + spin_unlock_irqrestore(&rtc->lock, flags); + + lpt = ((unsigned long long)lpt_msb << 32) | lpt_lsb; + do_div(lpt, rtc->clkrate); + rtc_time_to_tm(lpt, tm); + + return 0; +} + +static int st_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + unsigned long long lpt; + unsigned long secs, flags; + int ret; + + ret = rtc_tm_to_time(tm, &secs); + if (ret) + return ret; + + lpt = (unsigned long long)secs * rtc->clkrate; + + spin_lock_irqsave(&rtc->lock, flags); + + writel(lpt >> 32, rtc->ioaddr + LPC_LPT_MSB_OFF); + writel(lpt, rtc->ioaddr + LPC_LPT_LSB_OFF); + writel(1, rtc->ioaddr + LPC_LPT_START_OFF); + + spin_unlock_irqrestore(&rtc->lock, flags); + + return 0; +} + +static int st_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + unsigned long flags; + + spin_lock_irqsave(&rtc->lock, flags); + + memcpy(wkalrm, &rtc->alarm, sizeof(struct rtc_wkalrm)); + + spin_unlock_irqrestore(&rtc->lock, flags); + + return 0; +} + +static int st_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + + if (enabled && !rtc->irq_enabled) { + enable_irq(rtc->irq); + rtc->irq_enabled = true; + } else if (!enabled && rtc->irq_enabled) { + disable_irq(rtc->irq); + rtc->irq_enabled = false; + } + + return 0; +} + +static int st_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *t) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + struct rtc_time now; + unsigned long now_secs; + unsigned long alarm_secs; + unsigned long long lpa; + + st_rtc_read_time(dev, &now); + rtc_tm_to_time(&now, &now_secs); + rtc_tm_to_time(&t->time, &alarm_secs); + + /* Invalid alarm time */ + if (now_secs > alarm_secs) + return -EINVAL; + + memcpy(&rtc->alarm, t, sizeof(struct rtc_wkalrm)); + + /* Now many secs to fire */ + alarm_secs -= now_secs; + lpa = (unsigned long long)alarm_secs * rtc->clkrate; + + st_rtc_set_hw_alarm(rtc, lpa >> 32, lpa); + st_rtc_alarm_irq_enable(dev, t->enabled); + + return 0; +} + +static struct rtc_class_ops st_rtc_ops = { + .read_time = st_rtc_read_time, + .set_time = st_rtc_set_time, + .read_alarm = st_rtc_read_alarm, + .set_alarm = st_rtc_set_alarm, + .alarm_irq_enable = st_rtc_alarm_irq_enable, +}; + +static int st_rtc_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct st_rtc *rtc; + struct resource *res; + struct rtc_time tm_check; + uint32_t mode; + int ret = 0; + + ret = of_property_read_u32(np, "st,lpc-mode", &mode); + if (ret) { + dev_err(&pdev->dev, "An LPC mode must be provided\n"); + return -EINVAL; + } + + /* LPC can either run in RTC or WDT mode */ + if (mode != ST_LPC_MODE_RTC) + return -ENODEV; + + rtc = devm_kzalloc(&pdev->dev, sizeof(struct st_rtc), GFP_KERNEL); + if (!rtc) + return -ENOMEM; + + spin_lock_init(&rtc->lock); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + rtc->ioaddr = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(rtc->ioaddr)) + return PTR_ERR(rtc->ioaddr); + + rtc->irq = irq_of_parse_and_map(np, 0); + if (!rtc->irq) { + dev_err(&pdev->dev, "IRQ missing or invalid\n"); + return -EINVAL; + } + + ret = devm_request_irq(&pdev->dev, rtc->irq, st_rtc_handler, 0, + pdev->name, rtc); + if (ret) { + dev_err(&pdev->dev, "Failed to request irq %i\n", rtc->irq); + return ret; + } + + enable_irq_wake(rtc->irq); + disable_irq(rtc->irq); + + rtc->clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(rtc->clk)) { + dev_err(&pdev->dev, "Unable to request clock\n"); + return PTR_ERR(rtc->clk); + } + + clk_prepare_enable(rtc->clk); + + rtc->clkrate = clk_get_rate(rtc->clk); + if (!rtc->clkrate) { + dev_err(&pdev->dev, "Unable to fetch clock rate\n"); + return -EINVAL; + } + + device_set_wakeup_capable(&pdev->dev, 1); + + platform_set_drvdata(pdev, rtc); + + /* + * The RTC-LPC is able to manage date.year > 2038 + * but currently the kernel can not manage this date! + * If the RTC-LPC has a date.year > 2038 then + * it's set to the epoch "Jan 1st 2000" + */ + st_rtc_read_time(&pdev->dev, &tm_check); + + if (tm_check.tm_year >= (2038 - 1900)) { + memset(&tm_check, 0, sizeof(tm_check)); + tm_check.tm_year = 100; + tm_check.tm_mday = 1; + st_rtc_set_time(&pdev->dev, &tm_check); + } + + rtc->rtc_dev = rtc_device_register("st-lpc-rtc", &pdev->dev, + &st_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc->rtc_dev)) { + clk_disable_unprepare(rtc->clk); + return PTR_ERR(rtc->rtc_dev); + } + + return 0; +} + +static int st_rtc_remove(struct platform_device *pdev) +{ + struct st_rtc *rtc = platform_get_drvdata(pdev); + + if (likely(rtc->rtc_dev)) + rtc_device_unregister(rtc->rtc_dev); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int st_rtc_suspend(struct device *dev) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + return 0; + + writel(1, rtc->ioaddr + LPC_WDT_OFF); + writel(0, rtc->ioaddr + LPC_LPA_START_OFF); + writel(0, rtc->ioaddr + LPC_WDT_OFF); + + return 0; +} + +static int st_rtc_resume(struct device *dev) +{ + struct st_rtc *rtc = dev_get_drvdata(dev); + + rtc_alarm_irq_enable(rtc->rtc_dev, 0); + + /* + * clean 'rtc->alarm' to allow a new + * .set_alarm to the upper RTC layer + */ + memset(&rtc->alarm, 0, sizeof(struct rtc_wkalrm)); + + writel(0, rtc->ioaddr + LPC_LPA_MSB_OFF); + writel(0, rtc->ioaddr + LPC_LPA_LSB_OFF); + writel(1, rtc->ioaddr + LPC_WDT_OFF); + writel(1, rtc->ioaddr + LPC_LPA_START_OFF); + writel(0, rtc->ioaddr + LPC_WDT_OFF); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(st_rtc_pm_ops, st_rtc_suspend, st_rtc_resume); + +static struct of_device_id st_rtc_match[] = { + { .compatible = "st,stih407-lpc" }, + {} +}; +MODULE_DEVICE_TABLE(of, st_wdog_match); + +static struct platform_driver st_rtc_platform_driver = { + .driver = { + .name = "st-lpc-rtc", + .pm = &st_rtc_pm_ops, + .of_match_table = st_rtc_match, + }, + .probe = st_rtc_probe, + .remove = st_rtc_remove, +}; + +module_platform_driver(st_rtc_platform_driver); + +MODULE_DESCRIPTION("STMicroelectronics LPC RTC driver"); +MODULE_AUTHOR("David Paris "); +MODULE_LICENSE("GPLv2");