| Message ID | 1424819257-22664-1-git-send-email-peter.crosthwaite@xilinx.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Feb 24, 2015 at 11:07:37PM +0000, Peter Crosthwaite wrote: > ARM64 has the yield nop hint which has the intended semantics of > cpu_relax. Implement. > > The immediate application is ARM CPU emulators. An emulator can take > advantage of the yield hint to de-prioritise an emulated CPU in favor > of other emulation tasks. QEMU A64 SMP emulation has yield awareness, > and sees a significant boot time performance increase with this change. Could you elaborate on the QEMU SMP boot case please? Usually SMP pens for booting make use of wfe/sev to minimise the spinning overhead. Will
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index f9be30e..ac2381d 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -126,7 +126,11 @@ extern void release_thread(struct task_struct *); unsigned long get_wchan(struct task_struct *p); -#define cpu_relax() barrier() +static inline void cpu_relax(void) +{ + asm volatile("yield" ::: "memory"); +} + #define cpu_relax_lowlatency() cpu_relax() /* Thread switching */
ARM64 has the yield nop hint which has the intended semantics of cpu_relax. Implement. The immediate application is ARM CPU emulators. An emulator can take advantage of the yield hint to de-prioritise an emulated CPU in favor of other emulation tasks. QEMU A64 SMP emulation has yield awareness, and sees a significant boot time performance increase with this change. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> --- arch/arm64/include/asm/processor.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)