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[143.215.204.248]) by mx.google.com with ESMTPSA id x22sm3767452yha.38.2015.02.27.12.09.20 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Feb 2015 12:09:20 -0800 (PST) From: Pranith Kumar To: Catalin Marinas , Will Deacon , Steve Capper , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org (open list) Subject: [RFC PATCH] arm64: cmpxchg.h: Bring ldxr and stxr closer Date: Fri, 27 Feb 2015 15:09:17 -0500 Message-Id: <1425067776-2794-1-git-send-email-bobby.prani@gmail.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150227_120943_490309_F4EB40DA X-CRM114-Status: GOOD ( 10.48 ) X-Spam-Score: -0.8 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ARM64 documentation recommends keeping exclusive loads and stores as close as possible. Any instructions which do not depend on the value loaded should be moved outside. In the current implementation of cmpxchg(), there is a mov instruction which can be pulled before the load exclusive instruction without any change in functionality. This patch does that change. Signed-off-by: Pranith Kumar --- arch/arm64/include/asm/cmpxchg.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h index cb95930..8057735 100644 --- a/arch/arm64/include/asm/cmpxchg.h +++ b/arch/arm64/include/asm/cmpxchg.h @@ -89,8 +89,8 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, case 1: do { asm volatile("// __cmpxchg1\n" - " ldxrb %w1, %2\n" " mov %w0, #0\n" + " ldxrb %w1, %2\n" " cmp %w1, %w3\n" " b.ne 1f\n" " stxrb %w0, %w4, %2\n" @@ -104,8 +104,8 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, case 2: do { asm volatile("// __cmpxchg2\n" - " ldxrh %w1, %2\n" " mov %w0, #0\n" + " ldxrh %w1, %2\n" " cmp %w1, %w3\n" " b.ne 1f\n" " stxrh %w0, %w4, %2\n" @@ -119,8 +119,8 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, case 4: do { asm volatile("// __cmpxchg4\n" - " ldxr %w1, %2\n" " mov %w0, #0\n" + " ldxr %w1, %2\n" " cmp %w1, %w3\n" " b.ne 1f\n" " stxr %w0, %w4, %2\n" @@ -134,8 +134,8 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, case 8: do { asm volatile("// __cmpxchg8\n" - " ldxr %1, %2\n" " mov %w0, #0\n" + " ldxr %1, %2\n" " cmp %1, %3\n" " b.ne 1f\n" " stxr %w0, %4, %2\n" @@ -166,11 +166,11 @@ static inline int __cmpxchg_double(volatile void *ptr1, volatile void *ptr2, VM_BUG_ON((unsigned long *)ptr2 - (unsigned long *)ptr1 != 1); do { asm volatile("// __cmpxchg_double8\n" + " mov %w0, #0\n" " ldxp %0, %1, %2\n" " eor %0, %0, %3\n" " eor %1, %1, %4\n" " orr %1, %0, %1\n" - " mov %w0, #0\n" " cbnz %1, 1f\n" " stxp %w0, %5, %6, %2\n" "1:\n"