From patchwork Fri Feb 27 23:04:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 5903991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 299BDBF440 for ; Fri, 27 Feb 2015 23:09:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4FE8F202F2 for ; Fri, 27 Feb 2015 23:09:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 796732034B for ; Fri, 27 Feb 2015 23:09:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YRTzn-0001eV-Ph; Fri, 27 Feb 2015 23:06:59 +0000 Received: from mail-pa0-f52.google.com ([209.85.220.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YRTyW-0000wA-Ei for linux-arm-kernel@lists.infradead.org; Fri, 27 Feb 2015 23:05:41 +0000 Received: by pablj1 with SMTP id lj1so10186453pab.13 for ; Fri, 27 Feb 2015 15:05:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8kz7CAiDw5f71/1u5uA0itQ/iKANEymxAntmJBAqmdg=; b=Sfb80Z6KmbphFrggEfdHifdyngTslahzz1BUraOgQ7OFVwamCqzS8g/Vb467Rc4gsW 6thqaXFKS0h1+UkVnBxIkVHLYnX2GXF7MLSHoaTKIzEiEi7SfIJqrAf0SWg54X8ZjARZ 3uosNyZCBd12mUemX+jwGPtQZWoVLorJr7KADWGCZiQ+6zUhMZPZCxLfd7WnqX1NfTey zMEJRHqE2oHUqMsSzJ/l63iQyLBUIHGF8DdfJlAVbodKGNC0Lw3hMrMAHsJdqJq+tBLZ sUOifsrMWegEaAg5nHg/zCWcV1d+nwc7KBLE1MpYl8bgbv0aR2SkXYWH6yaY4nM08Lde mpZw== X-Gm-Message-State: ALoCoQntot8lYLo6xHWrEqkbFSYg69W+G1GabQ7ZNiRTudwIRNOcjK8duj7TAPQD9zKIeS6diiCz X-Received: by 10.66.218.231 with SMTP id pj7mr26987928pac.147.1425078318497; Fri, 27 Feb 2015 15:05:18 -0800 (PST) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [70.73.24.112]) by mx.google.com with ESMTPSA id jd10sm4990871pbd.23.2015.02.27.15.05.17 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Feb 2015 15:05:17 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH 5/5] coresight-stm: Bindings for System Trace Macrocell Date: Fri, 27 Feb 2015 16:04:54 -0700 Message-Id: <1425078294-13059-6-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1425078294-13059-1-git-send-email-mathieu.poirier@linaro.org> References: <1425078294-13059-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150227_150540_574142_EC4E684C X-CRM114-Status: GOOD ( 10.24 ) X-Spam-Score: -0.7 (/) Cc: kaixu.xia@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, zhang.chunyan@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The System Trace Macrocell (STM) is an IP block falling under the CoreSight umbrella. It's main purpose it so expose stimulus channels to any system component for the purpose of information logging. Bindings for this IP block adds a couple of items to the current mandatory definition for CoreSight components. Signed-off-by: Mathieu Poirier Acked-by: Rob Herring --- .../devicetree/bindings/arm/coresight.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index a3089359aaa6..648d50024429 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -17,6 +17,7 @@ its hardware characteristcs. - "arm,coresight-tmc", "arm,primecell"; - "arm,coresight-funnel", "arm,primecell"; - "arm,coresight-etm3x", "arm,primecell"; + - "arm,coresight-stm", "arm,primecell"; [1] * reg: physical base address and length of the register set(s) of the component. @@ -31,6 +32,14 @@ its hardware characteristcs. layout using the generic DT graph presentation found in "bindings/graph.txt". +* Additional required properties for System Trace Macrocells (STM): + * reg: along with the physical base address and length of the register + set as described above, another entry is required to describe the + mapping of the extended stimulus port area. + + * reg-names: the only acceptable values are "stm-base" and + "stm-stimulus-base", each corresponding to the areas defined in "reg". + * Required properties for devices that don't show up on the AMBA bus, such as non-configurable replicators: @@ -198,3 +207,22 @@ Example: }; }; }; + +4. STM + stm@20100000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x20100000 0 0x1000>, + <0 0x28000000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + stm_out_port: endpoint { + remote-endpoint = <&main_funnel_in_port2>; + }; + }; + }; + +[1]. There is currently two version of STM: STM32 and STM500. Both +have the same HW interface and as such don't need an explicit binding name.