| Message ID | 1425295754-13376-5-git-send-email-suzuki.poulose@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 02/03/15 11:29, Suzuki K. Poulose wrote: > From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> > > This patch separates the PMU driver code from the low level > CCI driver code. > > Introduces config options for both. > > ARM_CCI400_PORT_CTRL - controls the low level driver code for > CCI400 ports. > ARM_CCI400_PMU - controls the PMU driver code > ARM_CCI400_COMMON - Common defintions for CCI400 > > Also the ARM_CCI400_PORT_CTRL cannot be enabled by user. This > should be selected by platforms which need it. > > This patch also changes: > ARM_CCI - common code for probing the CCI devices. This can be > used for adding support for newer CCI versions(e.g, CCI-500). > > Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> > --- > arch/arm/mach-exynos/Kconfig | 2 +- > arch/arm/mach-vexpress/Kconfig | 4 ++-- > drivers/bus/Kconfig | 27 +++++++++++++++++++++++---- > drivers/bus/arm-cci.c | 24 ++++++++++++++++++++---- > include/linux/arm-cci.h | 7 ++++++- > 5 files changed, 52 insertions(+), 12 deletions(-) > [...] > diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig > index b99729e..bdc189f 100644 > --- a/drivers/bus/Kconfig > +++ b/drivers/bus/Kconfig > @@ -43,12 +43,31 @@ config OMAP_INTERCONNECT > help > Driver to enable OMAP interconnect error handling driver. > > -config ARM_CCI > - bool "ARM CCI driver support" > +config ARM_CCI400_PORT_CTRL > + bool > depends on ARM && OF && CPU_V7 > + select ARM_CCI400_COMMON > + help > + Low level power management driver for CCI400 cache coherent > + interconnect for ARM platforms. > + > +config ARM_CCI400_PMU > + bool "ARM CCI400 PMU support" > + depends on ARM || ARM64 > + depends on HW_PERF_EVENTS > + select ARM_CCI400_COMMON > help > - Driver supporting the CCI cache coherent interconnect for ARM > - platforms. > + Support for PMU events monitoring on the ARM CCI cache coherent > + interconnect. > + > + If unsure, say N Just a query rather than comment. Before this change all platforms having ARM_CCI and HW_PERF_EVENTS had CCI PMU enabled by default. With this change, one has to select this option explicitly. I assume that's fine, else this needs to be default 'y' Regards, Sudeep
On 03/03/15 15:53, Sudeep Holla wrote: > > > On 02/03/15 11:29, Suzuki K. Poulose wrote: >> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> >> >> This patch separates the PMU driver code from the low level >> CCI driver code. >> >> Introduces config options for both. >> >> ARM_CCI400_PORT_CTRL - controls the low level driver code for >> CCI400 ports. >> ARM_CCI400_PMU - controls the PMU driver code >> ARM_CCI400_COMMON - Common defintions for CCI400 >> >> Also the ARM_CCI400_PORT_CTRL cannot be enabled by user. This >> should be selected by platforms which need it. >> >> This patch also changes: >> ARM_CCI - common code for probing the CCI devices. This can be >> used for adding support for newer CCI versions(e.g, CCI-500). >> >> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> >> --- >> arch/arm/mach-exynos/Kconfig | 2 +- >> arch/arm/mach-vexpress/Kconfig | 4 ++-- >> drivers/bus/Kconfig | 27 +++++++++++++++++++++++---- >> drivers/bus/arm-cci.c | 24 ++++++++++++++++++++---- >> include/linux/arm-cci.h | 7 ++++++- >> 5 files changed, 52 insertions(+), 12 deletions(-) >> > > [...] > >> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig >> index b99729e..bdc189f 100644 >> --- a/drivers/bus/Kconfig >> +++ b/drivers/bus/Kconfig >> @@ -43,12 +43,31 @@ config OMAP_INTERCONNECT >> help >> Driver to enable OMAP interconnect error handling driver. >> >> -config ARM_CCI >> - bool "ARM CCI driver support" >> +config ARM_CCI400_PORT_CTRL >> + bool >> depends on ARM && OF && CPU_V7 >> + select ARM_CCI400_COMMON >> + help >> + Low level power management driver for CCI400 cache coherent >> + interconnect for ARM platforms. >> + >> +config ARM_CCI400_PMU >> + bool "ARM CCI400 PMU support" >> + depends on ARM || ARM64 >> + depends on HW_PERF_EVENTS >> + select ARM_CCI400_COMMON >> help >> - Driver supporting the CCI cache coherent interconnect for ARM >> - platforms. >> + Support for PMU events monitoring on the ARM CCI cache coherent >> + interconnect. >> + >> + If unsure, say N > > Just a query rather than comment. Before this change all platforms > having ARM_CCI and HW_PERF_EVENTS had CCI PMU enabled by default. > With this change, one has to select this option explicitly. I assume > that's fine, else this needs to be default 'y' Yes, that makes sense. Now that we decide if we can access the CCI safely at runtime, it is safe to make this default. Regards Suzuki
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 603820e..81064cd 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -123,7 +123,7 @@ config SOC_EXYNOS5800 config EXYNOS5420_MCPM bool "Exynos5420 Multi-Cluster PM support" depends on MCPM && SOC_EXYNOS5420 - select ARM_CCI + select ARM_CCI400_PORT_CTRL select ARM_CPU_SUSPEND help This is needed to provide CPU and cluster power management diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index d6b16d9..dd127f1 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -53,7 +53,7 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA config ARCH_VEXPRESS_DCSCB bool "Dual Cluster System Control Block (DCSCB) support" depends on MCPM - select ARM_CCI + select ARM_CCI400_PORT_CTRL help Support for the Dual Cluster System Configuration Block (DCSCB). This is needed to provide CPU and cluster power management @@ -71,7 +71,7 @@ config ARCH_VEXPRESS_SPC config ARCH_VEXPRESS_TC2_PM bool "Versatile Express TC2 power management" depends on MCPM - select ARM_CCI + select ARM_CCI400_PORT_CTRL select ARCH_VEXPRESS_SPC help Support for CPU and cluster power management on Versatile Express diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index b99729e..bdc189f 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -43,12 +43,31 @@ config OMAP_INTERCONNECT help Driver to enable OMAP interconnect error handling driver. -config ARM_CCI - bool "ARM CCI driver support" +config ARM_CCI400_PORT_CTRL + bool depends on ARM && OF && CPU_V7 + select ARM_CCI400_COMMON + help + Low level power management driver for CCI400 cache coherent + interconnect for ARM platforms. + +config ARM_CCI400_PMU + bool "ARM CCI400 PMU support" + depends on ARM || ARM64 + depends on HW_PERF_EVENTS + select ARM_CCI400_COMMON help - Driver supporting the CCI cache coherent interconnect for ARM - platforms. + Support for PMU events monitoring on the ARM CCI cache coherent + interconnect. + + If unsure, say N + +config ARM_CCI400_COMMON + bool + select ARM_CCI + +config ARM_CCI + bool config ARM_CCN bool "ARM CCN driver support" diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index 56ad928..f86f096 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c @@ -32,6 +32,7 @@ static void __iomem *cci_ctrl_base; static unsigned long cci_ctrl_phys; +#ifdef CONFIG_ARM_CCI400_PORT_CTRL struct cci_nb_ports { unsigned int nb_ace; unsigned int nb_ace_lite; @@ -42,12 +43,19 @@ static const struct cci_nb_ports cci400_ports = { .nb_ace_lite = 3 }; +#define CCI400_PORTS_DATA (&cci400_ports) +#else +#define CCI400_PORTS_DATA (NULL) +#endif + static const struct of_device_id arm_cci_matches[] = { - {.compatible = "arm,cci-400", .data = &cci400_ports }, +#ifdef CONFIG_ARM_CCI400_COMMON + {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA }, +#endif {}, }; -#ifdef CONFIG_HW_PERF_EVENTS +#ifdef CONFIG_ARM_CCI400_PMU #define DRIVER_NAME "CCI-400" #define DRIVER_NAME_PMU DRIVER_NAME " PMU" @@ -1020,14 +1028,16 @@ static int __init cci_platform_init(void) return platform_driver_register(&cci_platform_driver); } -#else /* !CONFIG_HW_PERF_EVENTS */ +#else /* !CONFIG_ARM_CCI400_PMU */ static int __init cci_platform_init(void) { return 0; } -#endif /* CONFIG_HW_PERF_EVENTS */ +#endif /* CONFIG_ARM_CCI400_PMU */ + +#ifdef CONFIG_ARM_CCI400_PORT_CTRL #define CCI_PORT_CTRL 0x0 #define CCI_CTRL_STATUS 0xc @@ -1458,6 +1468,12 @@ static int cci_probe_ports(struct device_node *np) return 0; } +#else /* !CONFIG_ARM_CCI400_PORT_CTRL */ +static inline int cci_probe_ports(struct device_node *np) +{ + return 0; +} +#endif /* CONFIG_ARM_CCI400_PORT_CTRL */ static int cci_probe(void) { diff --git a/include/linux/arm-cci.h b/include/linux/arm-cci.h index aede5c7..521ec1f 100644 --- a/include/linux/arm-cci.h +++ b/include/linux/arm-cci.h @@ -30,12 +30,16 @@ struct device_node; #ifdef CONFIG_ARM_CCI extern bool cci_probed(void); +#else +static inline bool cci_probed(void) { return false; } +#endif + +#ifdef CONFIG_ARM_CCI400_PORT_CTRL extern int cci_ace_get_port(struct device_node *dn); extern int cci_disable_port_by_cpu(u64 mpidr); extern int __cci_control_port_by_device(struct device_node *dn, bool enable); extern int __cci_control_port_by_index(u32 port, bool enable); #else -static inline bool cci_probed(void) { return false; } static inline int cci_ace_get_port(struct device_node *dn) { return -ENODEV; @@ -51,6 +55,7 @@ static inline int __cci_control_port_by_index(u32 port, bool enable) return -ENODEV; } #endif + #define cci_disable_port_by_device(dev) \ __cci_control_port_by_device(dev, false) #define cci_enable_port_by_device(dev) \