From patchwork Wed Mar 18 15:53:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 6041481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4DDE99F314 for ; Wed, 18 Mar 2015 16:05:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 53AB020374 for ; Wed, 18 Mar 2015 16:05:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3DD462024F for ; Wed, 18 Mar 2015 16:05:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YYGQ9-0005KA-Bl; Wed, 18 Mar 2015 16:02:13 +0000 Received: from ducie-dc1.codethink.co.uk ([185.25.241.215]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YYGI1-0002mV-M0 for linux-arm-kernel@lists.infradead.org; Wed, 18 Mar 2015 15:53:54 +0000 Received: from localhost (localhost [127.0.0.1]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTP id 4BFDB460925; Wed, 18 Mar 2015 15:53:28 +0000 (GMT) X-Virus-Scanned: Debian amavisd-new at ducie-dc1.codethink.co.uk Received: from ducie-dc1.codethink.co.uk ([127.0.0.1]) by localhost (ducie-dc1.codethink.co.uk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UPBo0bfIjnwG; Wed, 18 Mar 2015 15:53:26 +0000 (GMT) Received: from rainbowdash.ducie.codethink.co.uk (rainbowdash.dyn.ducie.codethink.co.uk [10.24.2.99]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTPS id 2289B46099C; Wed, 18 Mar 2015 15:53:26 +0000 (GMT) Received: from ben by rainbowdash.ducie.codethink.co.uk with local (Exim 4.84) (envelope-from ) id 1YYGHd-00087U-RA; Wed, 18 Mar 2015 15:53:25 +0000 From: Ben Dooks To: linux-kernel@lists.codethink.co.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/13] tty: serial: atmel: fix big-endian on ARMv7 devices Date: Wed, 18 Mar 2015 15:53:01 +0000 Message-Id: <1426693992-31163-3-git-send-email-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1426693992-31163-1-git-send-email-ben.dooks@codethink.co.uk> References: <1426693992-31163-1-git-send-email-ben.dooks@codethink.co.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150318_085350_174009_650C07E6 X-CRM114-Status: UNSURE ( 9.39 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: Greg Kroah-Hartman , Jiri Slaby , Ben Dooks , Nicolas Ferre , linux-serial@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for using this driver on ARMv7 devices configured for big endian. Signed-off-by: Ben Dooks Acked-by: Greg Kroah-Hartman --- CC: Nicolas Ferre CC: Greg Kroah-Hartman CC: Jiri Slaby CC: linux-serial@vger.kernel.org CC: Linux ARM Kernel --- drivers/tty/serial/atmel_serial.c | 62 ++++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 27 deletions(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 4e959c4..40ef95f 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -88,36 +88,44 @@ static void atmel_stop_rx(struct uart_port *port); #define ATMEL_ISR_PASS_LIMIT 256 +#ifdef CONFIG_AVR32 +#define __atserial_writel __raw_writel +#define __atserial_readl __raw_readl +#else +#define __atserial_writel writel_relaxed +#define __atserial_readl readl_relaxed +#endif + /* UART registers. CR is write-only, hence no GET macro */ -#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) -#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) -#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) -#define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) -#define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) -#define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) -#define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) -#define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) -#define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) -#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) -#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) -#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) -#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) -#define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME) -#define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION) +#define UART_PUT_CR(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_CR) +#define UART_GET_MR(port) __atserial_readl((port)->membase + ATMEL_US_MR) +#define UART_PUT_MR(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_MR) +#define UART_PUT_IER(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_IER) +#define UART_PUT_IDR(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_IDR) +#define UART_GET_IMR(port) __atserial_readl((port)->membase + ATMEL_US_IMR) +#define UART_GET_CSR(port) __atserial_readl((port)->membase + ATMEL_US_CSR) +#define UART_GET_CHAR(port) __atserial_readl((port)->membase + ATMEL_US_RHR) +#define UART_PUT_CHAR(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_THR) +#define UART_GET_BRGR(port) __atserial_readl((port)->membase + ATMEL_US_BRGR) +#define UART_PUT_BRGR(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_BRGR) +#define UART_PUT_RTOR(port,v) __atserial_writel(v, (port)->membase + ATMEL_US_RTOR) +#define UART_PUT_TTGR(port, v) __atserial_writel(v, (port)->membase + ATMEL_US_TTGR) +#define UART_GET_IP_NAME(port) __atserial_readl((port)->membase + ATMEL_US_NAME) +#define UART_GET_IP_VERSION(port) __atserial_readl((port)->membase + ATMEL_US_VERSION) /* PDC registers */ -#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) -#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) - -#define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) -#define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) -#define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) -#define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) -#define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) - -#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) -#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) -#define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR) +#define UART_PUT_PTCR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_PTCR) +#define UART_GET_PTSR(port) __atserial_readl((port)->membase + ATMEL_PDC_PTSR) + +#define UART_PUT_RPR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_RPR) +#define UART_GET_RPR(port) __atserial_readl((port)->membase + ATMEL_PDC_RPR) +#define UART_PUT_RCR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_RCR) +#define UART_PUT_RNPR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_RNPR) +#define UART_PUT_RNCR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_RNCR) + +#define UART_PUT_TPR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_TPR) +#define UART_PUT_TCR(port,v) __atserial_writel(v, (port)->membase + ATMEL_PDC_TCR) +#define UART_GET_TCR(port) __atserial_readl((port)->membase + ATMEL_PDC_TCR) struct atmel_dma_buffer { unsigned char *buf;