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Tue, 24 Mar 2015 23:41:02 -0700 From: Minghuan Lian To: Subject: [PATCH 1/3] arm/pci: Add support architecture-independent PCIe driver Date: Wed, 25 Mar 2015 14:42:39 +0800 Message-ID: <1427265761-31828-2-git-send-email-Minghuan.Lian@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1427265761-31828-1-git-send-email-Minghuan.Lian@freescale.com> References: <1427265761-31828-1-git-send-email-Minghuan.Lian@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Minghuan.Lian@freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(189002)(199003)(6806004)(86362001)(76176999)(50986999)(77156002)(19580395003)(19580405001)(77096005)(48376002)(47776003)(50466002)(62966003)(105606002)(229853001)(36756003)(85426001)(92566002)(2351001)(50226001)(110136001)(87936001)(46102003)(2950100001)(106466001)(104016003); DIR:OUT; SFP:1102; SCL:1; SRVR:BL2PR03MB561; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB561; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002010)(5005006); SRVR:BL2PR03MB561; BCL:0; PCL:0; RULEID:; SRVR:BL2PR03MB561; X-Forefront-PRVS: 052670E5A4 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2015 06:41:11.2945 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2PR03MB561 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150324_234135_002083_1A41E5BE X-CRM114-Status: GOOD ( 11.39 ) X-Spam-Score: -0.0 (/) Cc: Arnd Bergmann , Minghuan Lian , Jingoo Han , Hu Mingkai-B21284 , Zang Roy-R61911 , Yoder Stuart-B08248 , Bjorn Helgaas , Scott Wood , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PCIe common driver of arm architecture uses private structure pci_sys_data and hw_pci to associate with specific PCIe controller ops which results in the PCIe controller driver not compatible with other architectures. This patch provides another approach to support architecture-independent PCIe driver which does not need to use pci_sys_data and hw_pci and call pci_common_init_dev(). Signed-off-by: Minghuan Lian --- arch/arm/kernel/bios32.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index ab19b7c0..8820ed5 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -7,6 +7,7 @@ */ #include #include +#include #include #include #include @@ -17,12 +18,16 @@ #include static int debug_pci; +static int pci_commont_init_enable; #ifdef CONFIG_PCI_MSI struct msi_controller *pcibios_msi_controller(struct pci_dev *dev) { struct pci_sys_data *sysdata = dev->bus->sysdata; + if (!pci_commont_init_enable) + return NULL; + return sysdata->msi_ctrl; } #endif @@ -508,6 +513,8 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw) struct pci_sys_data *sys; LIST_HEAD(head); + pci_commont_init_enable = 1; + pci_add_flags(PCI_REASSIGN_ALL_RSRC); if (hw->preinit) hw->preinit(); @@ -597,7 +604,7 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, start = (start + align - 1) & ~(align - 1); - if (sys->align_resource) + if (pci_commont_init_enable && sys->align_resource) return sys->align_resource(dev, res, start, size, align); return start; @@ -651,3 +658,13 @@ void __init pci_map_io_early(unsigned long pfn) pci_io_desc.pfn = pfn; iotable_init(&pci_io_desc, 1); } + +/* + * Try to assign the IRQ number from DT when adding a new device + */ +int pcibios_add_device(struct pci_dev *dev) +{ + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); + + return 0; +}