From patchwork Tue Mar 31 19:14:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 6134381 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D572ABF4A6 for ; Tue, 31 Mar 2015 19:31:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 927752015E for ; Tue, 31 Mar 2015 19:31:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 74F4D20123 for ; Tue, 31 Mar 2015 19:31:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yd1nz-0000R9-Q2; Tue, 31 Mar 2015 19:26:31 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yd1cq-0007PF-Tc for linux-arm-kernel@bombadil.infradead.org; Tue, 31 Mar 2015 19:15:01 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yd1cl-0007xl-2G for linux-arm-kernel@lists.infradead.org; Tue, 31 Mar 2015 19:14:58 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id t2VJEYms027501; Tue, 31 Mar 2015 14:14:34 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t2VJEWgn026977; Tue, 31 Mar 2015 14:14:33 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Tue, 31 Mar 2015 14:14:32 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t2VJE5SB019468; Tue, 31 Mar 2015 14:14:31 -0500 From: Tero Kristo To: , , Subject: [PATCHv6 14/34] ARM: OMAP2+: control: determine control module base address from DT Date: Tue, 31 Mar 2015 22:14:07 +0300 Message-ID: <1427829267-32077-15-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1427829267-32077-1-git-send-email-t-kristo@ti.com> References: <1427829267-32077-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150331_201455_465915_5D991214 X-CRM114-Status: GOOD ( 21.46 ) X-Spam-Score: -6.9 (------) Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is no need to provide the control module base address through a low-level API from the low-level IO init, as this information is available through DT. This patch adds a new API to initialize the control module though, but mostly makes the old API obsolete. The old API can be completely removed once OMAP3 is made DT only. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/control.c | 49 +++++++++++++++++++++++++++++++++----- arch/arm/mach-omap2/control.h | 2 ++ arch/arm/mach-omap2/io.c | 34 +++++++++++++------------- arch/arm/mach-omap2/prm.h | 1 - arch/arm/mach-omap2/prm_common.c | 5 ---- 5 files changed, 61 insertions(+), 30 deletions(-) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index e881824..21ff32c 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -616,6 +616,7 @@ void __init omap3_ctrl_init(void) struct control_init_data { int index; + void __iomem *mem; }; static struct control_init_data ctrl_data = { @@ -627,10 +628,39 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am4-scrm", .data = &ctrl_data }, { .compatible = "ti,omap2-scrm", .data = &ctrl_data }, { .compatible = "ti,omap3-scrm", .data = &ctrl_data }, + { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { } }; /** + * omap2_control_base_init - initialize iomappings for the control driver + * + * Detects and initializes the iomappings for the control driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_control_base_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + struct control_init_data *data; + void __iomem *mem; + + for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { + data = (struct control_init_data *)match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + omap2_ctrl_base = mem; + data->mem = mem; + } + + return 0; +} + +/** * omap_control_init - low level init for the control driver * * Initializes the low level clock infrastructure for control driver. @@ -639,7 +669,6 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { int __init omap_control_init(void) { struct device_node *np; - void __iomem *mem; const struct of_device_id *match; const struct omap_prcm_init_data *data; int ret; @@ -647,14 +676,22 @@ int __init omap_control_init(void) for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { data = match->data; - mem = of_iomap(np, 0); - if (!mem) - return -ENOMEM; - - ret = omap2_clk_provider_init(np, data->index, mem); + ret = omap2_clk_provider_init(np, data->index, data->mem); if (ret) return ret; } return 0; } + +/** + * omap3_control_legacy_iomap_init - legacy iomap init for clock providers + * + * Legacy iomap init for clock provider. Needed only by legacy boot mode, + * where the base addresses are not parsed from DT, but still required + * by the clock driver to be setup properly. + */ +void __init omap3_control_legacy_iomap_init(void) +{ + omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap2_ctrl_base); +} diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index baf5783..c1057eb 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -464,9 +464,11 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); void omap3_ctrl_init(void); +int omap2_control_base_init(void); int omap_control_init(void); extern void omap2_set_globals_control(void __iomem *ctrl, void __iomem *ctrl_pad); +void __init omap3_control_legacy_iomap_init(void); #else #define omap_ctrl_base_get() 0 #define omap_ctrl_readb(x) 0 diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 712dd42..622ee3b 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -384,8 +384,7 @@ void __init omap2420_init_early(void) omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), - NULL); + omap2_control_base_init(); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -412,8 +411,7 @@ void __init omap2430_init_early(void) omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), - NULL); + omap2_control_base_init(); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -444,11 +442,15 @@ void __init omap3_init_early(void) omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), - NULL); - /* XXX: remove these two once OMAP3 is DT only */ - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); + /* XXX: remove these once OMAP3 is DT only */ + if (!of_have_populated_dt()) { + omap2_set_globals_control( + OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), + NULL); + } + omap2_control_base_init(); omap3xxx_check_revision(); omap3xxx_check_features(); omap3xxx_prm_init(); @@ -459,7 +461,7 @@ void __init omap3_init_early(void) omap3xxx_hwmod_init(); omap_hwmod_init_postsetup(); if (!of_have_populated_dt()) { - omap3_prcm_legacy_iomaps_init(); + omap3_control_legacy_iomap_init(); if (soc_is_am35xx()) omap_clk_soc_init = am35xx_clk_legacy_init; else if (cpu_is_omap3630()) @@ -546,8 +548,7 @@ void __init ti814x_init_early(void) { omap2_set_globals_tap(TI814X_CLASS, OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -565,8 +566,7 @@ void __init ti816x_init_early(void) { omap2_set_globals_tap(TI816X_CLASS, OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -586,8 +586,7 @@ void __init am33xx_init_early(void) { omap2_set_globals_tap(AM335X_CLASS, AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); - omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); am33xx_prm_init(); @@ -610,8 +609,7 @@ void __init am43xx_init_early(void) { omap2_set_globals_tap(AM335X_CLASS, AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); - omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); omap44xx_prm_init(); diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 6d0a808..6707333 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -21,7 +21,6 @@ extern u16 prm_features; extern void omap2_set_globals_prm(void __iomem *prm); int omap_prcm_init(void); int omap2_prm_base_init(void); -void omap3_prcm_legacy_iomaps_init(void); # endif /* diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index b23d232..a943e14 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -722,11 +722,6 @@ int __init omap_prcm_init(void) return 0; } -void __init omap3_prcm_legacy_iomaps_init(void) -{ - omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get()); -} - static int __init prm_late_init(void) { if (prm_ll_data->late_init)