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[92.90.26.57]) by mx.google.com with ESMTPSA id cf12sm12243851wjb.10.2015.04.03.10.02.34 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Apr 2015 10:02:37 -0700 (PDT) From: Maxime Coquelin To: u.kleine-koenig@pengutronix.de, afaerber@suse.de, geert@linux-m68k.org, Rob Herring , Philipp Zabel , Linus Walleij , Arnd Bergmann , stefan@agner.ch, pmeerw@pmeerw.net, pebolle@tiscali.nl, peter@hurleysoftware.com, andy.shevchenko@gmail.com, cw00.choi@samsung.com, Russell King , Daniel Lezcano Subject: [PATCH v5 09/15] dt-bindings: Document the STM32 USART bindings Date: Fri, 3 Apr 2015 19:01:15 +0200 Message-Id: <1428080481-18591-10-git-send-email-mcoquelin.stm32@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1428080481-18591-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1428080481-18591-1-git-send-email-mcoquelin.stm32@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150403_100300_271955_2CDC1093 X-CRM114-Status: GOOD ( 10.33 ) X-Spam-Score: -0.6 (/) Cc: Mark Rutland , linux-doc@vger.kernel.org, Will Deacon , Nikolay Borisov , linux-api@vger.kernel.org, Jiri Slaby , linux-arch@vger.kernel.org, Jonathan Corbet , Mauro Carvalho Chehab , Antti Palosaari , linux-serial@vger.kernel.org, devicetree@vger.kernel.org, Kees Cook , Pawel Moll , Ian Campbell , Rusty Russell , Joe Perches , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Michal Marek , linux-gpio@vger.kernel.org, Greg Kroah-Hartman , linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com, Kumar Gala , Tejun Heo , Andrew Morton , "David S. Miller" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documentation of device tree bindings for the STM32 USART Tested-by: Chanwoo Choi Signed-off-by: Maxime Coquelin --- .../devicetree/bindings/serial/st,stm32-usart.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/st,stm32-usart.txt diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt new file mode 100644 index 0000000..090a3a4 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt @@ -0,0 +1,32 @@ +* STMicroelectronics STM32 USART + +Required properties: +- compatible: Can be either "st,stm32-usart" or "st,stm32-uart" depending on +whether the device supports synchronous mode. +- reg: The address and length of the peripheral registers space +- interrupts: The interrupt line of the USART instance +- clocks: The input clock of the USART instance + +Optional properties: +- pinctrl: The reference on the pins configuration +- st,hw-flow-ctrl: bool flag to enable hardware flow control. + +Examples: +usart4: serial@40004c00 { + compatible = "st,stm32-uart"; + reg = <0x40004c00 0x400>; + interrupts = <52>; + clocks = <&clk_pclk1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart4>; +}; + +usart2: serial@40004400 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004400 0x400>; + interrupts = <38>; + clocks = <&clk_pclk1>; + st,hw-flow-ctrl; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rtscts>; +};