From patchwork Thu Apr 9 09:35:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 6186501 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 115DD9F444 for ; Thu, 9 Apr 2015 09:43:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1B54720376 for ; Thu, 9 Apr 2015 09:43:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0CE742037C for ; Thu, 9 Apr 2015 09:43:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yg8xA-0000SH-80; Thu, 09 Apr 2015 09:40:52 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yg8tQ-00054P-O2 for linux-arm-kernel@lists.infradead.org; Thu, 09 Apr 2015 09:37:02 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id t399aVCK005849; Thu, 9 Apr 2015 04:36:31 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t399aUNu008375; Thu, 9 Apr 2015 04:36:30 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Thu, 9 Apr 2015 04:36:29 -0500 Received: from dflp32.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t399Ztxs015582; Thu, 9 Apr 2015 04:36:26 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH v5 8/8] ARM: DTS: dra7x: Integrate sDMA crossbar Date: Thu, 9 Apr 2015 12:35:54 +0300 Message-ID: <1428572154-3548-9-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1428572154-3548-1-git-send-email-peter.ujfalusi@ti.com> References: <1428572154-3548-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150409_023700_923386_F5861050 X-CRM114-Status: UNSURE ( 8.37 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.0 (-----) Cc: nm@ti.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, robh+dt@kernel.org, grant.likely@linaro.org, maxime.ripard@free-electrons.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The sDMA requests are routed through the DMA crossbar and without the crossbar only peripherals using DMA request 0-127 can be used. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/dra7.dtsi | 57 ++++++++++++++++++++++++++------------------- 1 file changed, 33 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 5332b57b4950..a2f4aa01984f 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -303,6 +303,15 @@ dma-requests = <127>; }; + sdma_xbar: dma-router@4a002b78 { + compatible = "ti,dra7-dma-crossbar"; + reg = <0x4a002b78 0xfc>; + #dma-cells = <1>; + dma-requests = <205>; + ti,dma-safe-map = <0>; + dma-masters = <&sdma>; + }; + gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; @@ -398,7 +407,7 @@ ti,hwmods = "uart1"; clock-frequency = <48000000>; status = "disabled"; - dmas = <&sdma 49>, <&sdma 50>; + dmas = <&sdma_xbar 49>, <&sdma_xbar 50>; dma-names = "tx", "rx"; }; @@ -409,7 +418,7 @@ ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "disabled"; - dmas = <&sdma 51>, <&sdma 52>; + dmas = <&sdma_xbar 51>, <&sdma_xbar 52>; dma-names = "tx", "rx"; }; @@ -420,7 +429,7 @@ ti,hwmods = "uart3"; clock-frequency = <48000000>; status = "disabled"; - dmas = <&sdma 53>, <&sdma 54>; + dmas = <&sdma_xbar 53>, <&sdma_xbar 54>; dma-names = "tx", "rx"; }; @@ -431,7 +440,7 @@ ti,hwmods = "uart4"; clock-frequency = <48000000>; status = "disabled"; - dmas = <&sdma 55>, <&sdma 56>; + dmas = <&sdma_xbar 55>, <&sdma_xbar 56>; dma-names = "tx", "rx"; }; @@ -442,7 +451,7 @@ ti,hwmods = "uart5"; clock-frequency = <48000000>; status = "disabled"; - dmas = <&sdma 63>, <&sdma 64>; + dmas = <&sdma_xbar 63>, <&sdma_xbar 64>; dma-names = "tx", "rx"; }; @@ -453,7 +462,7 @@ ti,hwmods = "uart6"; clock-frequency = <48000000>; status = "disabled"; - dmas = <&sdma 79>, <&sdma 80>; + dmas = <&sdma_xbar 79>, <&sdma_xbar 80>; dma-names = "tx", "rx"; }; @@ -862,7 +871,7 @@ ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; - dmas = <&sdma 61>, <&sdma 62>; + dmas = <&sdma_xbar 61>, <&sdma_xbar 62>; dma-names = "tx", "rx"; status = "disabled"; pbias-supply = <&pbias_mmc_reg>; @@ -874,7 +883,7 @@ interrupts = ; ti,hwmods = "mmc2"; ti,needs-special-reset; - dmas = <&sdma 47>, <&sdma 48>; + dmas = <&sdma_xbar 47>, <&sdma_xbar 48>; dma-names = "tx", "rx"; status = "disabled"; }; @@ -885,7 +894,7 @@ interrupts = ; ti,hwmods = "mmc3"; ti,needs-special-reset; - dmas = <&sdma 77>, <&sdma 78>; + dmas = <&sdma_xbar 77>, <&sdma_xbar 78>; dma-names = "tx", "rx"; status = "disabled"; }; @@ -896,7 +905,7 @@ interrupts = ; ti,hwmods = "mmc4"; ti,needs-special-reset; - dmas = <&sdma 57>, <&sdma 58>; + dmas = <&sdma_xbar 57>, <&sdma_xbar 58>; dma-names = "tx", "rx"; status = "disabled"; }; @@ -1041,14 +1050,14 @@ #size-cells = <0>; ti,hwmods = "mcspi1"; ti,spi-num-cs = <4>; - dmas = <&sdma 35>, - <&sdma 36>, - <&sdma 37>, - <&sdma 38>, - <&sdma 39>, - <&sdma 40>, - <&sdma 41>, - <&sdma 42>; + dmas = <&sdma_xbar 35>, + <&sdma_xbar 36>, + <&sdma_xbar 37>, + <&sdma_xbar 38>, + <&sdma_xbar 39>, + <&sdma_xbar 40>, + <&sdma_xbar 41>, + <&sdma_xbar 42>; dma-names = "tx0", "rx0", "tx1", "rx1", "tx2", "rx2", "tx3", "rx3"; status = "disabled"; @@ -1062,10 +1071,10 @@ #size-cells = <0>; ti,hwmods = "mcspi2"; ti,spi-num-cs = <2>; - dmas = <&sdma 43>, - <&sdma 44>, - <&sdma 45>, - <&sdma 46>; + dmas = <&sdma_xbar 43>, + <&sdma_xbar 44>, + <&sdma_xbar 45>, + <&sdma_xbar 46>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -1078,7 +1087,7 @@ #size-cells = <0>; ti,hwmods = "mcspi3"; ti,spi-num-cs = <2>; - dmas = <&sdma 15>, <&sdma 16>; + dmas = <&sdma_xbar 15>, <&sdma_xbar 16>; dma-names = "tx0", "rx0"; status = "disabled"; }; @@ -1091,7 +1100,7 @@ #size-cells = <0>; ti,hwmods = "mcspi4"; ti,spi-num-cs = <1>; - dmas = <&sdma 70>, <&sdma 71>; + dmas = <&sdma_xbar 70>, <&sdma_xbar 71>; dma-names = "tx0", "rx0"; status = "disabled"; };